MC14023UBCL Motorola, MC14023UBCL Datasheet

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MC14023UBCL

Manufacturer Part Number
MC14023UBCL
Description
Tripple 3-input NAND gate
Manufacturer
Motorola
Datasheet
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
UB-Suffix Series CMOS Gates
enhancement mode devices in a single monolithic structure (Complemen-
tary MOS). Their primary use is where low power dissipation and/or high
noise immunity is desired. The UB set of CMOS gates are inverting
non–buffered functions.
REV 3
1/94
MC14001UB
18
12
13
The UB Series logic gates are constructed with P and N channel
Motorola, Inc. 1995
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Linear and Oscillator Applications
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Double Diode Protection on All Inputs
Pin–for–Pin Replacements for Corresponding CD4000 Series UB Suffix
Devices
1
2
5
6
8
9
10
12
11
2
3
4
5
9
Quad 2–Input
Dual 4–Input
MC14001UB
MC14012UB
NAND Gate
NOR Gate
NC = 6, 8
1
13
3
4
10
11
LOGIC DIAGRAMS
10
12
11
12
13
11
2
3
4
5
9
1
2
8
3
4
5
FOR ALL DEVICES
Triple 3–Input
Dual 4–Input
MC14002UB
MC14023UB
V DD = PIN 14
NAND Gate
V SS = PIN 7
NOR Gate
NC = 6, 8
9
6
10
1
13
11
12
13
12
13
1
2
8
3
4
5
1
2
5
6
8
9
Quad 2–Input
Triple 3–Input
MC14025UB
MC14011UB
NAND Gate
NOR Gate
3
4
10
11
9
6
10
Triple 3-Input NAND Gate
Quad 2-Input NAND Gate
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
operation, V in and V out should be constrained
to the range V SS
appropriate logic voltage level (e.g., either V SS
or V DD ). Unused outputs must be left open.
Dual 4-Input NAND Gate
Triple 3-Input NOR Gate
Quad 2-Input NOR Gate
Dual 4-Input NOR Gate
This device contains protection circuitry to
Unused inputs must always be tied to an
T A = – 55 to 125 C for all packages.
MC14001UB
MC14002UB
MC14011UB
MC14012UB
MC14023UB
MC14025UB
ORDERING INFORMATION
MC14XXXUBCP
MC14XXXUBCL
MC14XXXUBD
MOTOROLA CMOS LOGIC DATA
v
(V in or V out )
CASE 751A
CERAMIC
CASE 632
CASE 646
D SUFFIX
L SUFFIX
P SUFFIX
PLASTIC
Plastic
Ceramic
SOIC
SOIC
v
V DD .

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MC14023UBCL Summary of contents

Page 1

... Unused outputs must be left open. MC14001UB MC14002UB MC14011UB MC14012UB MC14023UB MC14025UB L SUFFIX CERAMIC CASE 632 P SUFFIX PLASTIC CASE 646 D SUFFIX SOIC CASE 751A ORDERING INFORMATION MC14XXXUBCP Plastic MC14XXXUBCL Ceramic MC14XXXUBD SOIC – 125 C for all packages out ) MOTOROLA CMOS LOGIC DATA ...

Page 2

... Maximum Ratings are those values beyond which damage to the device may occur. †Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW From 125 _ C Ceramic “L” Packages: – From 100 125 _ C MOTOROLA CMOS LOGIC DATA PIN ASSIGNMENTS MC14002UB Dual 4–Input NOR Gate ...

Page 3

... MOTOROLA CMOS LOGIC DATA Unit Unit Vdc Vdc Vdc Vdc mAdc mAdc Adc pF ...

Page 4

... V SS MOTOROLA CMOS LOGIC DATA Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î pF Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 5

... Device Shown Vdc Unused input connected Vdc 125 – 8 6.0 5.0 Vdc 4 2 2.0 4.0 6.0 8 INPUT VOLTAGE (Vdc) Figure 3. Typical Voltage Transfer Characteristics versus Temperature 15 Vdc Vdc – 125 5.0 Vdc c 4.0 6.0 8 DRAIN VOLTAGE (Vdc) Characteristics MOTOROLA CMOS LOGIC DATA ...

Page 6

... SEATING PLANE 0.25 (0.010 SEATING PLANE MOTOROLA CMOS LOGIC DATA OUTLINE DIMENSIONS L SUFFIX CERAMIC DIP PACKAGE CASE 632–08 ISSUE 0.25 (0.010 SUFFIX PLASTIC DIP PACKAGE CASE 646–06 ISSUE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. ...

Page 7

... Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur ...

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