AD9803JST Analog Devices, AD9803JST Datasheet
AD9803JST
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AD9803JST Summary of contents
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... CLPDM DAC1 DAC2 REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. ...
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AD9803–SPECIFICATIONS GENERAL SPECIFICATIONS Parameter TEMPERATURE RANGE Operating Storage POWER SUPPLY VOLTAGE (For Functional Operation) Analog Digital Digital Driver POWER CONSUMPTION (Power-Down Modes Selected Through Serial I/F) Normal Operation (D-Reg 00) High Speed AUX-MODE (D-Reg 01) Reference Standby (D-Reg 10 or ...
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CCD-MODE SPECIFICATIONS P arameter POWER CONSUMPTION 3.0 DD MAXIMUM CLOCK RATE CDS Gain 1 Allowable CCD Reset Transient 1 Max Input Range Before Saturation PGA Max Input Range Max Output ...
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AD9803–SPECIFICATIONS AUX-MODE SPECIFICATIONS Parameter POWER CONSUMPTION Normal (D-Reg 00) High Speed (D-Reg 01) MAXIMUM CLOCK RATE PGA Max Input Range Max Output Range Digital Gain Control Gain Control Resolution Gain (Selected by the Serial I/F) Gain(0) Gain(255) ACTIVE CLAMP (CLAMP ...
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TIMING SPECIFICATIONS CCD N SHP t INHIBIT SHD ADCCLK t OD D0–D9 N–8 NOTES: 1. SHP AND SHD SHOULD BE OPTIMALLY ALIGNED WITH THE CCD SIGNAL. SAMPLES ARE TAKEN AT THE RISING EDGES. 2. ADCCLK RISING EDGE MUST OCCUR AT ...
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... Exposure to absolute maximum ratings for extended periods may affect device reliability. Model Temperature Range AD9803JST +70 C CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. ...
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CONNECT Pin Name Type 2–11 D0– DRVDD P 13 DRVSS P 14 DVSS P 15 ACLP P 16 ADCCLK DI 17 DVDD P 18 STBY DI 19 PBLK DI ...
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AD9803 EQUIVALENT INPUT CIRCUITS DVDD DVSS Figure 5. Pins 2–11 (D0–D9) DVDD 200 DVSS Figure 6. Pin 16, 21, 22 (ADCCLK, SHP, SHD) ACVDD 50 SUBST ACVSS Figure 7. Pins 25, 28 (CCDBYP) DRVDD SUBST DRVSS Figure 8. Pin 26 ...
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ACVDD 50 50 SUBST ACVSS Figure 11. Pin 34 (AUXIN) and Pin 36 (ADCIN) ACVDD 5.5k OPEN – ANALOG CONTROL CLOSED – DIGITAL CONTROL SUBST CMLEVEL Figure 12. Pin 35 (AUXCONT) ADVDD 9.3k ADVSS Figure 13. Pin 37 (CMLEVEL) REV. ...
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Performance Characteristics AD9803 240 220 V = 3.3V DD 200 V = 3.0V DD 180 V = 2.8V DD 160 140 120 SAMPLE RATE – MHz Figure 17. CCD-MODE Power vs. Clock Rate 0.6 ...
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THEORY OF OPERATION Introduction The AD9803 is a 10-bit analog-to-digital interface for CCD cameras. The block level diagram of the system is shown in Figure 23. The device includes a correlated double sampler (CDS), 0 dB–30 dB programmable gain amplifier ...
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AD9803 Black Level Clamping For correct signal processing, the CCD signal must be refer- enced to a well established “black level.” The AD9803 uses the CCD’s optical black (OB) pixels as a calibration signal, which is used to establish the ...
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Even-Odd Pixel Offset Correction The AD9803 includes digital correction circuitry following the 10-bit ADC. The purpose of the digital correction is remove the residual offset between the even and odd pixel channels, which results from the “ping-pong” CDS architecture of ...
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AD9803 SERIAL INTERFACE SPECIFICATIONS SDATA SELECT MODES PGA DAC1 DAC2 MODES2 a0–a1 b0–b1 A-REG B-REG (a) OPERATION MODES (b) OUTPUT MODES ...
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REGISTER DESCRIPTION (a) A-REGISTER: Modes of Operation (Power-On Default a1 a0 Modes 0 0 ADC-MODE 0 1 AUX-MODE 1 0 CCD-MODE 1 1 CCD-MODE (b) B-REGISTER: Output Modes (Default = 00 ...
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AD9803 NOTE: With the exception of a write to the PGA register dur- ing AUX-mode, all data writes must be 10 bits. During an AUX-mode write to the PGA register, only 8 bits of data are required. If more than ...
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F 0.1 F DIGITAL OUTPUT DATA CONNECT Figure 37. CCD-Mode Circuit Configuration—Digital PGA Control REV 0 ...
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AD9803 0 (LSB (MSB) 11 DIGITAL OUTPUT DRVDD 12 DATA ...
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REV. 0 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 48-Lead Plastic Thin Quad Flatpack (LQFP) (ST-48) 0.063 (1.60) MAX 0.354 (9.00) BSC 0.030 (0.75) 0.057 (1.45) 0.276 (7.0) BSC 0.030 (0.75) 0.018 (0.45) 0.053 (1.35) 0.018 (0.45 ...