XPC8241LZP200B Motorola, XPC8241LZP200B Datasheet

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... Section 1.7, “System Design Information” Section 1.8, “Document Revision History” Section 1.9, “Ordering Information” To locate any published errata or updates for this document, refer to the web site at http://www.motorola.com/semiconductors. 1.1 Overview The MPC8241 integrated processor is comprised of a peripheral logic block and a 32-bit superscalar MPC603e core, as shown in Figure 1 ...

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... Data Instruction Instruction Cache Cache Cache Data Bus Data Path (32- or 64-Bit) ECC Controller with 8-Bit Parity or ECC Memory Memory/ROM/ Controller Port X Control/Address SDRAM_SYNC_IN SDRAM Clocks DLL Peripheral Logic PCI_SYNC_IN PLL Fanout PCI Bus Buffers Clocks OSC_IN MOTOROLA ...

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... Supports banks of 16-, 64-, 128-, 256-, or 512-Mbit memory devices – Write buffering for PCI and processor accesses – Supports normal parity, read-modify-write (RMW), or ECC – Data-path buffering between memory interface and processor MOTOROLA MPC8241 Integrated Processor Hardware Specifications Features 2 O interface), and an I ...

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... I C controller with full master/slave support that accepts broadcast messages — Programmable interrupt controller (PIC) – Five hardware interrupts (IRQs serial interrupts – Four programmable timers with cascade — Two (dual) universal asynchronous receiver/transmitters (UARTs) 4 MPC8241 Integrated Processor Hardware Specifications MOTOROLA ...

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... The following list provides a summary of the general parameters of the MPC8241: Technology Die size Transistor count Logic design Packages Core power supply I/O power supply MOTOROLA MPC8241 Integrated Processor Hardware Specifications 0.25 µm CMOS, five-layer metal 2 49.2 mm 4.5 million Fully static Surface-mount 357 (thick substrate and thick mold cap) plastic ball grid array (PBGA) 1.8 V ± ...

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... DD /AV 2 –0.3 to 2.1 DD –0 –0 105 j T –55 to 150 stg + 0.5 V DC. DD Recommended Unit Notes Value ± 1.8 100 mV V ± 3.3 0.3 V ± 1.8 100 mV ± 1.8 100 mV V ± 5 ± 3.3 0 MOTOROLA Unit °C ° ...

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... PCI pins are designed to withstand LV 8. Caution: Input voltage (V ) must not be greater than the supply voltage (V in all times including during power-on reset. Input voltage (V 0 all times including during power-on reset. MOTOROLA MPC8241 Integrated Processor Hardware Specifications Electrical and Thermal Characteristics Symbol V in ...

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... LV DD See Note /AV DD 100 µs V Stable DD PLL Relock 3 Time HRST_CPU and HRST_CTRL Asserted 255 External Memory 2 Clock Cycles 9 External Memory Clock Cycles Setup Time Maximum Rise Time Must be Less Than One External Memory Clock Cycle @ 5 V _OV /( Time 1 MOTOROLA ...

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... Figure 4 and Figure 5 show the undershoot and overshoot voltage of the MPC8241 PCI interface for 3.3- and 5-V signals, respectively. Overvoltage Waveform Undervoltage Waveform Figure 4. Maximum AC Waveforms for 3.3-V Signaling MOTOROLA MPC8241 Integrated Processor Hardware Specifications Electrical and Thermal Characteristics _OV DD Not to Exceed 10% ...

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... Table 3. DC Electrical Specifications Symbol Min V 0. _OV DD V — 2 3 GND/GNDRING GND/GNDRING IL 2 — — L 3.465 2 3 — 3 p-to-p (Min) 10.75 V p-to-p (Min) Max Unit Notes 0.3 GV _OV 3.3 V 0.8 V — V 0.4 V ±70 µA ±10 µA — V 0.4 V MOTOROLA ...

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... DD 0.4-V table entry. 5. See driver bit details for output driver control register (0x73) in the MPC8245 Integrated Processor User’s Manual. 6. See Chip Errata No the MPC8245/MPC8241 Integrated Processor Chip Errata. MOTOROLA MPC8241 Integrated Processor Hardware Specifications Electrical and Thermal Characteristics Symbol Min C — ...

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... V where a nominal FP value, a nominal INT and AV 2) < 15 mW, guaranteed by design, but not tested value resulted from the MPC8241 operating at the fastest frequency Unit Notes 66/66/ 66/133/ 266 266 1.5 1 1.9 2 1.6 1 1.0 1 0.4 0 0.2 0 Maximum Unit Notes 1100 mW MOTOROLA 8 ...

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... PLL_CFG[0:4] signals. Parts are sold by maximum processor core frequency. See Section 1.9, “Ordering Information.” Table 7 provides the operating frequency information for the MPC8241 at recommended operating conditions (see Table 2) with LV DD MOTOROLA MPC8241 Integrated Processor Hardware Specifications Electrical and Thermal Characteristics Value (166- and ...

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... T clk ((N – 0.5) 25 — 40 266 MHz Unit Min Max 100 266 MHz 33 133 MHz MHz Max Unit Notes 66 MHz 2 150 ps 250 ps 190 ps 3 100 µ (max loop – T (min)) clk dp – T (max loop T – T (min)) clk dp 66 MHz MOTOROLA ...

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... PC board runner) corresponds to approximately delay. T tap delay. See Table 9 for values of T Refer to Motorola Application Note AN2164, MPC8245/MPC8241 Memory Clock Design Guidelines, for more details on memory clock design. 7. Rise and fall times for the OSC_IN input is guaranteed by design and characterization. OSC_IN input rise and fall times are not tested ...

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... DLL lock range, it also means there may be slightly more jitter in the output clock of the DLL, should the phase comparator shift the clock between adjacent tap points. Refer to Motorola Application Note AN2164, MPC8245/MPC8241 Memory Clock Design Guidelines, for more details on memory design. ...

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... Electrical and Thermal Characteristics Electrical and Thermal Characteristics 30 27.5 25 22.5 20 17.5 15 12.5 10 7.5 0 Figure 8. DLL Locking Range Loop Delay vs. Frequency of Operation for DLL_Extend = 1 17 MPC8241 Integrated Processor Hardware Specifications Propagation Delay Time (ns) loop and Tap Max Delay MOTOROLA ...

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... Electrical and Thermal Characteristics Electrical and Thermal Characteristics 25 22.5 20 17.5 15 12.5 10 7.5 0 Figure 9. DLL Locking Range Loop Delay vs. Frequency of Operation for DLL_Extend = 0 18 MPC8241 Integrated Processor Hardware Specifications Propagation Delay Time (ns) loop and Normal Tap Delay MOTOROLA ...

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... Figure 10. DLL Locking Range Loop Delay vs. Frequency of Operation for DLL_Extend = 0 1.4.3.2 Input AC Timing Specifications Table 10 provides the input AC timing specifications at recommended operating conditions (see Table 2) with LV = 3.3 V ± 0.3 V. See Figure 11 and Figure 12 MPC8241 Integrated Processor Hardware Specifications Propagation Delay Time (ns) loop and Max Tap Delay MOTOROLA ...

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... SDRAM_SYNC_IN must be shortened by this amount relative to the SDRAM clock output trace lengths to maintain phase-alignment of the memory clocks with respect to sys_logic_clk. Note that the DLL locking range graphs of Figure 7 through Figure 10 compensate for T duration Refer to Motorola Application Note AN2164, MPC8245/MPC8241 Memory Clock Design os Guidelines, for more details on accommodating for the problem ...

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... Inputs/Outputs GV DD Input Timing Figure 12. Input/Output Timing Diagram Referenced to PCI_SYNC_IN 21 MPC8241 Integrated Processor Hardware Specifications 11a 12b-d 2.0 V 2.0 V 0 _OV GV _OV 12a 11c _OV DD VM 13b 14b Output Timing GV _OV 13a 14a GV _OV 0.615 0.285 Output Timing MOTOROLA ...

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... V ± 0.3 V. See Figure 11. All output timings assume a purely DD Characteristic 2 C) 11b Min Max Unit Notes — 6.0 ns — 6.5 — 7.0 — 7.5 — 4.5 ns — 7.0 ns — 5.0 ns — 6.0 ns 2.0 — 2.5 — 3.0 — 3.5 — 1.0 — ns — 14.0 ns MOTOROLA ...

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... Output Figure 14. AC Test Load for the MPC8241 23 MPC8241 Integrated Processor Hardware Specifications Characteristic _OV /2 of the rising edge of PCI_SYNC_IN to 0.285 DD DD Output Measurements are Made at the Device Pin Min Max Unit Notes — 4 _OV _OV /2 for DD DD PCI or Memory MOTOROLA ...

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... Note: Diagram not to scale. Figure 15. PCI_HOLD_DEL Affect on Output Valid and Hold Time 24 MPC8241 Integrated Processor Hardware Specifications GV _OV / 13a2, 2.1 ns for 33 MHz PCI PCI_HOLD_DEL = 10 13a0 for 66 MHz PCI PCI_HOLD_DEL = 00 As PCI_HOLD_DEL Values Decrease As PCI_HOLD_DEL Values Increase Output Valid GV _OV / Output Hold MOTOROLA ...

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... Max Unit Notes — CLKs – — CLKs — — CLKs — — CLKs 1,2 — CLKs bus. The qualified SCL, SDA MOTOROLA ...

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... SDRAM_CLK @ 100 MHz @ 133 MHz 3.44 MHz 4.58 MHz 2.22 MHz 2.95 MHz 1.63 MHz 2.18 MHz 1.29 MHz 1.72 MHz 917 1.22 MHz 709 943 487 648 371 494 251 335 190 253 128 170 96 128 MOTOROLA ...

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... FDR D + (output start condition hold time) FDR 4 Figure 16 Timing Diagram I Max Unit Notes — CLKs 1–3 — CLKs 1–3 — – — CLKs 1–3 < — CLKs 1–3 — CLKs 1, 3 — CLKs 1–3 — CLKs bus. The qualified SCL, SDA MOTOROLA ...

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... SCL/SDA qualified Note: The delay is the local memory clock times DFFSR times two plus one local memory clock. Figure 19 MPC8241 Integrated Processor Hardware Specifications Figure 17 Timing Diagram II 2 Figure 18 Timing Diagram III 2 C Timing Diagram IV (Qualified Signal Input Data Valid MOTOROLA ...

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... Figure 20. PIC Serial Interrupt Mode Output Timing Diagram 29 MPC8241 Integrated Processor Hardware Specifications _OV = 3.3 V ± 5% and Min 1/14 SDRAM_SYNC_IN 1/2 SDRAM_SYNC_IN 40 — 0 — 1 sys_logic_clk period + 6 1 sys_logic_clk period + 2 — 3.3 V ± 0 Max Unit Notes MHz — — — ns — — MOTOROLA ...

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... Nontest (other than TDO) signal output timing with respect to TCK. TCK 3 Figure 22. JTAG Clock Input Timing Diagram 30 MPC8241 Integrated Processor Hardware Specifications 3.3 V ± 0.3 V. Timings are independent of DD Min Midpoint Voltage 7 Max Unit Notes 25 MHz — ns — — — ns — — — ns — MOTOROLA ...

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... Data Inputs Data Outputs Data Outputs Figure 24. JTAG Boundary Scan Timing Diagram TCK TDI, TMS TDO TDO Figure 25. Test Access Port Timing Diagram 31 MPC8241 Integrated Processor Hardware Specifications Input Data Valid 8 Output Data Valid Input Data Valid 12 Output Data Valid 13 MOTOROLA ...

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... Solder Balls Solder Ball Diameter Maximum Module Height 2.52 mm Co-planarity Specification 0.15 mm Maximum Force 32 MPC8241 Integrated Processor Hardware Specifications 357 1. (PBGA)—62 Sn/36 Pb (Lead free version of package) 0.75 mm 6.0 lbs. total, uniformly distributed over package (8 grams/ball) 95.5 Sn/4.0 Ag/0.5 Cu — MOTOROLA ...

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... Package Description Package Description 1.5.2 Pin Assignments and Package Dimensions Figure 26 shows the top surface, side profile, and pinout of the MPC8241, 357 PBGA package. Figure 26. MPC8241 Package Dimensions and Pinout Assignments 33 MPC8241 Integrated Processor Hardware Specifications MOTOROLA ...

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... DRV_PCI _OV DRV_PCI _OV DRV_PCI _OV — _OV DRV_PCI _OV DRV_PCI 2 DD _OV DRV_PCI _OV DRV_PCI _OV — _OV — _OV DRV_PCI _OV DRV_PCI _OV DRV_PCI _OV DRV_PCI _OV DRV_PCI _OV — DD _OV DRV_STD_MEM _OV DRV_STD_MEM 1 DD _OV DRV_MEM_CTRL 1 DD MOTOROLA ...

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... I/O GV _OV DD DD Output Notes Driver Type DRV_MEM_CTRL 1 DRV_MEM_CTRL 10, 11 DRV_MEM_CTRL 10, 11 DRV_MEM_CTRL — DRV_STD_MEM 5 DRV_MEM_CTRL 1, 10, 11 DRV_MEM_CTRL 1 — DRV_MEM_CTRL 5, 12 DRV_MEM_CTRL 5, 12 DRV_MEM_CTRL 5, 12 DRV_MEM_CTRL DRV_MEM_CTRL DRV_STD_MEM 1 DRV_MEM_CTRL 10 DRV_MEM_CTRL 10 DRV_MEM_CTRL 10, 11 DRV_MEM_CTRL DRV_MEM_CTRL 10, 11 — DRV_PCI DRV_PCI DRV_PCI DRV_PCI MOTOROLA ...

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... DRV_STD_MEM 8, 12 DRV_PCI_CLK 5, 14 DRV_PCI_CLK 5, 14 DRV_PCI_CLK 5, 14 DRV_PCI_CLK 5, 14 DRV_PCI_CLK 5, 14 DRV_PCI_CLK 5, 14 DRV_PCI_CLK 5, 14 DRV_PCI_CLK 5, 14 DRV_PCI_CLK 5, 14 DRV_PCI_CLK — DRV_MEM_CTRL 1, 22 DRV_MEM_CTRL — DRV_STD_MEM 5 — 15 — — DRV_STD_MEM 10, 11, 16 — — 12 DRV_MEM_CTRL 5, 12 DRV_MEM_CTRL 5, 12 DRV_STD_MEM 5, 10, 11 MOTOROLA ...

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... DD DD Power and Ground Signals Ground Reference LV DD voltage 3.3 V, 5.0 V Output Notes Driver Type DRV_MEM_CTRL 5, 12 — DRV_STD_MEM 5, 12 DRV_STD_MEM 1, 10, 11 DRV_STD_MEM 23 DRV_STD_MEM 1, 2, 10, 11 DRV_STD_MEM — — 13, 21 — — 12 — — DRV_PCI 23 — — — 17 — MOTOROLA ...

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... DD DD Output GV _OV DD DD I/O GV _OV DD DD Output GV _OV DD DD I/O GV _OV DD DD Output GV _OV DD DD Output GV _OV DD DD Output Notes Driver Type — 18 — — — — DRV_STD_MEM 5, 10, 11 DRV_STD_MEM 5 DRV_PCI 19 DRV_PCI_CLK 5 — DRV_PCI — DRV_PCI 1, 19 DRV_STD_MEM 19 MOTOROLA ...

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... MPC8241 is shown in Table 18 and Table 19. 39 MPC8241 Integrated Processor Hardware Specifications Power Pin Type Supply Output GV DD and V entries in Table /AV / more than 1 any time including during power-on reset less on the TEST0 pin. and cannot be changed. Output Notes Driver Type _OV DRV_MEM_CTRL _OV . DD DD MOTOROLA ...

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... Off Off MOTOROLA ...

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... VCO) (MHz) Off Off Multipliers CPU Clock PCI-to- Mem-to- Range Mem CPU (MHz) (Mem VCO) (CPU VCO) 188–263 3 (2) 2.5 (2) 225–264 3 (2) 3 (2) 225–266 1 (4) 4.5 (2) 100–133 1 (Bypass) 2 (4) 100–176 2 (4) 2 (4) Note 20 Bypass MOTOROLA ...

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... Off Off 231-266 2(2) 3.5(2) MOTOROLA ...

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... No longer supported. 43 MPC8241 Integrated Processor Hardware Specifications 9 266-MHz Part PCI Clock Input Periph Logic/ (PCI_SYNC_IN) Mem Bus 1 Range Clock Range (MHz) (MHz) Not usable Multipliers CPU Clock PCI-to- Mem-to- Range Mem CPU (MHz) (Mem VCO) (CPU VCO) Off Off MOTOROLA ...

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... MPC8241 Integrated Processor Hardware Specifications 2 input signals should be filtered of any noise in the 500 kHz to DD 2.2 µF 2.2 µF Low ESL Surface Mount Capacitors GND pin of the MPC8241 also recommended that these decoupling , and LV planes, to enable quick recharging of the smaller chip _OV power DD DD MOTOROLA ...

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... The SDRAM_SYNC_OUT signal is intended to be routed halfway out to the SDRAM devices and then returned to the SDRAM_SYNC_IN input of the MPC8241. The trace length may be used to skew or adjust the timing window as needed. See Motorola application notes AN1849/D, MPC107 Design Guide, and AN2164/D, MPC8245/MPC8241 Memory Clock Design Guidelines, for more information on this topic. ...

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... IC). Regardless of the numbering, the signal placement recommended in Figure 28 is common to all known emulators. 46 MPC8241 Integrated Processor Hardware Specifications DD ) pins should be connected to 3.3 ± 0.3 V power supply pins should be connected to MOTOROLA ...

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... CHKSTOP_IN functions as output SDMA14 in extended ROM mode. 47 MPC8241 Integrated Processor Hardware Specifications 5 HRESET 13 5 SRESET 11 TRST VDD_SENSE CHKSTOP_IN 8 TMS 9 TDO 1 TDI 3 TCK with a 1-k pull-up resistor. DD with a 10-k pull-up resistor. DD Figure 28. COP Connector Diagram MPC8241 5 SRESET HRST_CPU HRST_CTRL TRST CHKSTOP_IN TMS TDO TDI TCK 1 QACK MOTOROLA ...

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... A large heat sink (cross cut extrusion, 38 there exists low board level thermal loading from adjacent components. (Label used—2s2p/sink.) 48 MPC8241 Integrated Processor Hardware Specifications PBGA Package Clip Wire Printed-Circuit Board 38 16.5 mm) is attached to the PBGA package and 38 16.5 mm) is attached to the PBGA package and Option MOTOROLA ...

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... Aavid Thermalloy, Alpha Novatech, IERC, Chip Coolers, and Wakefield Engineering offer different heat sink-to-ambient thermal resistances, and may or may not need airflow. 49 MPC8241 Integrated Processor Hardware Specifications 1 1.5 2 Airflow Velocity (m/s) 603-224-9988 408-749-7601 818-842-7277 800-522-6752 603-635-5102 /sink 2s 2p/s ink 2.5 MOTOROLA ...

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... Of course, the selection of any thermal interface material depends on many factors: thermal performance requirements, manufacturability, service temperature, dielectric properties, cost, etc. 50 MPC8241 Integrated Processor Hardware Specifications Radiation Convection Heat Sink Thermal Interface Material Die/Package Die Junction Package/Leads Radiation Convection MOTOROLA ...

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... W. Salzburg Rd. Midland, MI 48686-0997 Internet: www.dow.com Shin-Etsu MicroSi, Inc. 10028 S. 51st St. Phoenix, AZ 85044 Internet: www.microsi.com 51 MPC8241 Integrated Processor Hardware Specifications Silicone Sheet (0.006 in.) Bare Joint Floroether Oil Sheet (0.007 in.) Graphite/Oil Sheet (0.005 in.) Synthetic Grease Contact Pressure (psi) 800-347-4572 781-935-4850 800-248-2481 888-642-7674 MOTOROLA ...

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... MPC8241 Integrated Processor Hardware Specifications 888-246-9050 , can be obtained from the equation For instance, the user can change the size of the heat CA ) can be used to determine the junction temperature with MOTOROLA ...

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... References Semiconductor Equipment and Materials International 805 East Middlefield Rd. Mountain View, CA 94043 (415) 964-5111 MIL-SPEC and EIA/JESD (JEDEC) specifications are available from Global Engineering Documents at 800-854-7179 or 303-397-7956. JEDEC specifications are available on the WEB at http://www.jedec.org. 53 MPC8241 Integrated Processor Hardware Specifications MOTOROLA ...

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... Section 1.7.9—Updated list for heat sink and thermal interface vendors. Section 1.9—Changed format of ordering information section. Added tables to reflect part number specifications also available. Added Sections 1.9.2 and 1.9.3. 54 MPC8241 Integrated Processor Hardware Specifications Table 20. Revision History Table Substantive Change(s) . symbol MOTOROLA ...

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... Table 21 provides the Motorola part numbering nomenclature for the MPC8241. Note that the individual part numbers correspond to a maximum processor core frequency. For available frequencies, contact your local Motorola sales office. In addition to the processor frequency, the part numbering scheme also includes an application modifier which may specify special application conditions. Each part number also contains a revision code which refers to the die mask revision number ...

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... PBGA VR = Lead free version of package Document Order Number of Operating Conditions 1.8 V ± 100 mV, –40 to 105 C 166 MHz, 200 MHz, 266 MHz nnn x Processor Revision Level 2 Frequency 166 MHz Contact local Motorola 200 MHz Sales Office 266 MHz Applicable Specification MPC8241TZPPNS/D MOTOROLA ...

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... MMMMMM is the 6-digit mask number. ATWLYYWWA is the traceability code. CCCCC is the country of assembly. This space is left blank if parts are assembled in the United States. Figure 33. Part Marking for PBGA Device 57 MPC8241 Integrated Processor Hardware Specifications MPC8241L xx266x MMMMMM ATWLYYWWA 8241 PBGA MOTOROLA ...

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... Ordering Information Ordering Information THIS PAGE INTENTIONALLY LEFT BLANK 58 MPC8241 Integrated Processor Hardware Specifications MOTOROLA ...

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... Ordering Information Ordering Information THIS PAGE INTENTIONALLY LEFT BLANK 59 MPC8241 Integrated Processor Hardware Specifications MOTOROLA ...

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... Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. digital dna is a trademark of Motorola, Inc. The PowerPC name is a trademark of IBM Corp. and is used under license. All other product or service names are the property of their respective owners. ...