MCM69R736CZP5 Freescale Semiconductor, Inc, MCM69R736CZP5 Datasheet
MCM69R736CZP5
Related parts for MCM69R736CZP5
MCM69R736CZP5 Summary of contents
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... Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA 4M Late Write HSTL The MCM69R736C/818C is a 4M–bit synchronous late write fast static RAM designed to provide high performance in secondary cache and ATM switch, Telecom, and other high speed memory applications. The MCM69R818C (organized as 256K words by 18 bits) and the MCM69R736C (organized as 128K words by 36 bits) are fabricated in Motorola’ ...
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... Freescale Semiconductor, Inc. ADDRESS SA REGISTERS SW SW REGISTERS SBx REGISTERS MCM69R736C DDQ DQc DQc DQc DQc DDQ DQc DQc DQc SBc NC SBb H DQc DQc DDQ ref ref K DQd DQd DQd DQd SBd CK SBa M V DDQ DQd DQd DQd DQd DQd DDQ TMS ...
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... Freescale Semiconductor, Inc. MCM69R736C PIN DESCRIPTIONS PBGA Pin Locations 4K 4L (a) 6K, 7K, 6L, 7L, 6M, 6N, 7N, 6P, 7P (b) 6D, 7D, 6E, 7E, 6F, 6G, 7G, 6H, 7H (c) 1D, 2D, 1E, 2E, 2F, 1G, 2G, 1H, 2H (d) 1K, 2K, 1L, 2L, 2M, 1N, 2N, 1P 2A, 3A, 5A, 6A, 3B, 5B, 2C, 3C, 5C, 6C, 4N, 4P, 2R, 6R, 3T, 4T, 5T 5L, 5G, 3G, 3L (a), (b), (c), (d) ...
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... Freescale Semiconductor, Inc. MCM69R818C PIN DESCRIPTIONS PBGA Pin Locations 4K 4L (a) 6D, 7E, 6F, 7G, 6H, 7K, 6L, 6N, 7P (b) 1D, 2E, 2G, 1H, 2K, 1L, 2M, 1N 2A, 3A, 5A, 6A, 3B, 5B, 2C, 3C, 5C, 6C, 4N, 4P, 2R, 6R, 2T, 3T, 5T, 6T 5L, 3G (a), ( 4C, 2J, 4J, 6J, 4R, 5R 1A, 7A, 1F, 7F, 1J, 7J, 1M, 7M, 1U, 7U 3J, 5J 3D, 5D, 3E, 5E, 3F, 5F, 5G, 3H, 5H, 3K, ...
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... Freescale Semiconductor, Inc. ABSOLUTE MAXIMUM RATINGS (Voltages Referenced See Note) Rating Core Supply Voltage Output Supply Voltage Voltage On Any Pin Input Current (per I/O) Output Current (per I/O) Operating Temperature Temperature Under Bias Storage Temperature NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded ...
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... Freescale Semiconductor, Inc. DC OPERATING CONDITIONS AND CHARACTERISTICS ( 3 10%, – 5 RECOMMENDED OPERATING CONDITIONS Parameter Symbol Core Power Supply Voltage Output Driver Supply Voltage Active Power Supply Current (Device Selected, All Outputs Open, Freq = Max Max, V DDQ = Max). Includes Supply Currents for Quiescent Active Power Supply Current (Device Selected, All Outputs Open, Freq = Max, V DDQ = Max) ...
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... Freescale Semiconductor, Inc. DC OUTPUT BUFFER CHARACTERISTICS — PROGRAMMABLE IMPEDANCE PUSH–PULL OUTPUT BUFFER MODE ( 3 DDQ = 1 See Notes 1 and 2) Parameter Output Logic Low Output Logic High Light Load Output Logic Low Light Load Output Logic High NOTES: 1. The impedance controlled mode is expected to be used in point–to–point applications, driving high–impedance inputs. ...
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... Freescale Semiconductor, Inc. AC OPERATING CONDITIONS AND CHARACTERISTICS ( 3 10%, – 5 Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . Input Timing Measurement Reference Level . . . . . . . . . . . . . . Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . READ/WRITE CYCLE TIMING Parameter Symbol Cycle Time t KHKH Clock High Pulse Width t KHKL Clock Low Pulse Width t KLKH Clock High to Output Low– ...
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... Freescale Semiconductor, Inc. AC INPUT CHARACTERISTICS (See Note 1) Parameter AC Input Logic High (See Figure 4) AC Input Logic Low (See Figures 2 and 4) Input Reference Peak–to–Peak AC Voltage Clock Input Differential Voltage NOTES: 1. Inputs may overshoot 1.5 V (peak) for up to 35% t KHKH (e.g., 1 clock cycle time of 4.4 ns). See Figure 2. ...
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... Freescale Semiconductor, Inc. REGISTER/REGISTER READ–WRITE–READ CYCLES t KHKH CK t AVKH t KHAX SVKH SS SW SBx KHQV DQx Q–1 For More Information On This Product, MCM69R736C MCM69R818C 10 t KHKL t KLKH KHSX t WVKH t KHWX t KHQX1 t KHQZ t KHQX t KHQX t DVKH to: www.freescale.com A4 t KHDX Q3 MOTOROLA FAST SRAM ...
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... Freescale Semiconductor, Inc. REGISTER/REGISTER READ–WRITE–READ t KHKH CK t AVKH t KHAX SBx G DQx Q–1 For More Information On This Product, MOTOROLA FAST SRAM (G Controlled) t KHKL t KLKH GHQZ t GLQX to: www.freescale.com A4 t GLQV t GHQX Q3 MCM69R736C MCM69R818C 11 ...
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... Freescale Semiconductor, Inc. É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É ...
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... Freescale Semiconductor, Inc. FUNCTIONAL OPERATION READ AND WRITE OPERATIONS All control signals except G are registered on the rising edge of the CK clock. These signals must meet the setup and hold times shown in the AC Characteristics table. On the rising edge of the following clock, read data is clocked into the output register and available at the outputs at t KHQV ...
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... Freescale Semiconductor, Inc. SLEEP MODE This device is equipped with an optional sleep or low power mode. The sleep mode pin is asynchronous and active high. During normal operation, the ZZ pin is pulled low. When ZZ is pulled high, the chip will enter sleep mode where the device will meet the lowest possible power conditions. ...
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... Freescale Semiconductor, Inc. TAP AC OPERATING CONDITIONS AND CHARACTERISTICS ( 3 10%, – 5 Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . Input Timing Measurement Reference Level . . . . . . . . . . . . . . . Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . . TAP CONTROLLER TIMING Parameter Cycle Time Clock High Time Clock Low Time TMS Setup TMS Hold TDI Valid to TCK High TCK High to TDI Don’ ...
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... Freescale Semiconductor, Inc. TEST ACCESS PORT PINS TCK — TEST CLOCK (INPUT) Clocks all TAP events. All inputs are captured on the rising edge of TCK and all outputs propagate from the falling edge of TCK. TMS — TEST MODE SELECT (INPUT) The TMS input is sampled on the rising edge of TCK. This is the command input for the TAP controller state machine ...
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... Freescale Semiconductor, Inc. MCM69R736C Bump/Bit Scan Order Bit Signal Bump Bit Signal No. Name ID No DQa DQa DQa DQa DQa DQa DQa DQa DQa SBa SBb DQb DQb DQb DQb DQb DQb DQb DQb DQb NOTES: 1. The NC pads listed in this table are indeed no connects, but are represented in the boundary scan register by a “place holder” bit that is forced to logic 1 ...
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... Freescale Semiconductor, Inc. TAP CONTROLLER INSTRUCTION SET OVERVIEW There are two classes of instructions defined in IEEE Stan- dard 1149.1–1990; the standard (public) instructions and device specific (private) instructions. Some public instruc- tions, are mandatory for IEEE 1149.1 compliance. Optional public instructions must be implemented in prescribed ways. ...
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... Freescale Semiconductor, Inc. STANDARD (PUBLIC) INSTRUCTION CODES Instruction Code* EXTEST 000 Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces all DQ pins IDCODE 001** Preloads ID register and places it between TDI and TDO. Does not affect RAM operation. ...
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... For More Information On This Product, MCM69R736C MCM69R818C 20 ORDERING INFORMATION (Order by Full Part Number) 69R736C MCM 69R818C Tape and Reel, Blank = Tray Speed ( ns, 4.4 = 4.4 ns ns, Package (ZP = PBGA) MCM69R818CZP4 MCM69R736CZP4R MCM69R818CZP4.4 MCM69R736CZP4.4R MCM69R818CZP5 MCM69R736CZP5R MCM69R818CZP6 MCM69R736CZP6R PACKAGE DIMENSIONS ZP PACKAGE BUMP PBGA CASE 999–02 b 119X 0 0. ...