MC13111AFTA Freescale Semiconductor, Inc, MC13111AFTA Datasheet
MC13111AFTA
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... This document contains information on a new product. Specifications and information herein are subject to change without notice. MOTOROLA ANALOG IC DEVICE DATA NARROWBAND FM RECEIVER Device MC13110AFB MC13110AFTA MC13110BFB MC13110BFTA MC13111AFB MC13111AFTA MC13111BFB MC13111BFTA Simplified Block Diagram Limiting IF 2nd LO Amplifier 2nd Mixer Detector RSSI ...
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Mix 1st LO VCO Out 42 V cap Ctrl Speaker 43 Gnd Audio Amp 44 SA Out Speaker Mute Expander E Out 46 Vol Control E 47 cap 48 ...
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MAXIMUM RATINGS Characteristic Power Supply Voltage Junction Temperature Maximum Power Dissipation NOTES: 1. Devices should not be operated at these limits. The “Recommended Operating Conditions” provide for actual device operation. 2. ESD data available upon ...
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ELECTRICAL CHARACTERISTICS ( 3 1 Active Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic FM RECEIVER ( 46.77 MHz [USA Ch 21], ...
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ELECTRICAL CHARACTERISTICS (continued 3 1 Active Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic SECOND MIXER (No Modulation 10.7 MHz, ...
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ELECTRICAL CHARACTERISTICS (continued 3 1 Active Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic R x AUDIO PATH ( 1.0 kHz, ...
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ELECTRICAL CHARACTERISTICS (continued 3 1 Active Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic DATA AMP COMPARATOR Hysteresis Threshold Voltage Input Impedance Output ...
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ELECTRICAL CHARACTERISTICS (continued 3 1 Active Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic T x AUDIO PATH ( 1.0 kHz, ...
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ELECTRICAL CHARACTERISTICS (continued 3 1 Active Mode, unless otherwise specified; Test Circuit Figure 1.) Characteristic LOW BATTERY DETECT Output Low Voltage ( ...
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Coil Q Out Out RF Out Mix 10 MC13110A/B MC13111A/B Lim CC V Lim Lim Lim SGnd 2 Mix 2 Mix Gnd 1 Mix 1 Mix Out ...
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Pin Symbol/ Symbol/ Type LQFP–48 QFP–52 E Equivalent Internal Circuit (52 Pin QFP Out (Output ...
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PIN FUNCTION DESCRIPTION Pin Symbol/ Symbol/ Type Type LQFP–48 QFP–52 Equivalent Internal Circuit (52 Pin QFP) Equivalent Internal Circuit (52 Pin QFP Data Clk (Input) Data, EN, Clk 11 12 Clk Out (Output) ...
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PIN FUNCTION DESCRIPTION Pin Symbol/ Symbol/ Type Type LQFP–48 QFP–52 Equivalent Internal Circuit (52 Pin QFP) Equivalent Internal Circuit (52 Pin QFP Cap (Input Amp Out (Output ...
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PIN FUNCTION DESCRIPTION Pin Symbol/ Symbol/ Type Type LQFP–48 QFP–52 Equivalent Internal Circuit (52 Pin QFP) Equivalent Internal Circuit (52 Pin QFP RSSI 186 Coil ...
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PIN FUNCTION DESCRIPTION Pin Symbol/ Symbol/ Type Type LQFP–48 QFP–52 Equivalent Internal Circuit (52 Pin QFP) Equivalent Internal Circuit (52 Pin QFP Mix 2 Out (Output Gnd Mix 1 Out (Output ...
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PIN FUNCTION DESCRIPTION Pin Symbol/ Symbol/ Type Type LQFP–48 QFP–52 Equivalent Internal Circuit (52 Pin QFP) Equivalent Internal Circuit (52 Pin QFP Out (Output Cap (Input Scr Out ...
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DEVICE DESCRIPTION AND APPLICATION INFORMATION The following text, graphics, tables and schematics are provided to the user as a source of valuable technical information about the Universal Cordless Telephone IC. This information originates from thorough evaluation of the device performance ...
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Figure 3. Current versus Supply Voltage Inactive Mode 5.0 0 2.7 3.1 3.5 3.9 4 SUPPLY VOLTAGE (V) Figure 5. Current versus Supply Voltage Receive Mode 5.0 4.9 4.8 4.7 ...
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Figure 9. Additional Supply Current Consumption versus Supply Voltage, IP3 = <1> 1.50 1.48 1.46 1.44 1.42 1.40 1.38 1.36 1.34 1.32 1.30 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5 ...
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Mixer Description The 1st and 2nd mixers are similar in design. Both are double balanced to suppress the LO and the input frequencies to give only the sum and difference frequencies at the mixer output. Typically the LO is suppressed ...
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Figure 17. First Mixer Voltage Conversion Gain, IP3_bit = 3 10.695 MHz, 330 Ω 8.0 6.0 4.0 2.0 –40 –35 –30 –25 –20 Mix 1 In, MIXER INPUT LEVEL (dBm) ...
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Second Mixer Figures 26 through 29 represents the second mixer transfer characteristics for the voltage conversion gain, output level, and intermodulation. There is a slight improvement in gain when the “IP3 bit” is set to <1> for the second mixer. ...
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Figure 26. Second Mixer Conversion Gain, IP3_bit = 3 455 kHz 1500 Ω –40 –35 –30 –25 –20 Mix 2 In, MIXER INPUT LEVEL ...
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First Local Oscillator The 1st multi–vibrator oscillator. The tank circuit is composed of a parallel external capacitance and inductance, internal programmable capacitor matrix, and internal varactor. The local oscillator requires a voltage controlled input to the internal ...
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Figure 33. First LO Varicap Capacitance versus Control Voltage 9.0 8.0 7.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 V capCtrl , CONTROL VOLTAGE (V) Figure 35. Representative Parallel Impedance versus Capacitor Select ...
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Second Local Oscillator The 2nd CMOS oscillator used as the PLL reference oscillator and local oscillator for the second frequency conversion in the RF receiver designed to utilize an external parallel resonant crystal. ...
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Figure 43. Start–Up Time versus Capacitor Ratio, Inactive Mode 30 10.24 MHz Crystal Ω 5 0.5 1.0 1.5 2.0 2.5 CAPACITOR RATIO ...
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IF Limiter and Demodulator The limiting IF amplifier typically has about 110 dB of gain; the frequency response starts rolling off at 1.0 MHz. Decoupling capacitors should be placed close to Pins 31 and 32 to ensure low noise and ...
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Figure 51. Ceramic Resonator Demodulator Schematic with Murata CDBM450C48 C 28 390 p Lim Out 1 Ceramic Resonator R ext Murata 2.7 k CDBM450C34 Figure 52. S–Curve of Limiter Discriminator with Quadrature Coil 2.2 1.8 1.4 1.0 0.6 0.2 425 ...
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RSSI and Carrier Detect The Received Signal Strength Indicator (RSSI) indicates the strength of the IF level. The output is proportional to the logarithm of the IF input signal magnitude. RSSI dynamic range is typically 80 dB. A 187 kΩ ...
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RF System Performance The sensitivity of the IC is typically 0.4 µVrms matched (single ended or differential) with no preamp. To achieve suitable system performance, a preamp and passive duplexer may be used. In production final test, each section of ...
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Figure 64. Typical Receiver Performance Parameters U.S. Handset Application Channel S/N 60 RSSI 50 40 SINAD –120 –100 –80 –60 –40 Mix 1 In, RF INPUT (dBm) Figure 66. Typical Performance Parameters Over ...
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Receive Audio Path The R x Audio signal path begins at “Rx Audio In” and goes through the IC to “E Out”. The “R x Audio In”, “Scr Out”, and “E In” pins are all ac–coupled. This signal path consists ...
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Figure 71 Audio Wideband Frequency Response 10 –10 –30 –50 –70 –110 R x Audio In –90 to Scr Out –20 dBV 100 1000 10000 100000 f, FREQUENCY (Hz) Figure 73 Audio Ripple ...
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Figure 77 Audio Maximum Output Voltage versus Gain Control Setting –4.0 –6 3.6 V THD = 2% –8.0 –10 –12 –14 –16 –18 –20 –9.0 –7.0 –5.0 –3.0 –1.0 1.0 3 PROGRAMMABLE GAIN ...
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Transmit Audio Path This portion of the audio path goes from “C In” to “T x Out”. The “C In” pin will be ac–coupled. The audio transmit signal path includes automatic level control (ALC) (also referred to as the Compressor), ...
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Figure 82 Audio Wideband Frequency Response 10 0 –10 –20 –30 –40 –50 –60 –70 – Out –10 dBV –90 –100 100 1000 10000 f, FREQUENCY (Hz) Figure 84. T ...
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Figure 88 Audio Compressor Response 0 ALC Off, –5.0 Limiter On –10 –15 Compressor Transfer –20 –25 –30 Distortion –35 –40 –60 –50 –40 –30 –20 –10 C In, INPUT VOLTAGE LEVEL (dBV) Figure 90 Audio ...
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PLL Frequency Synthesizer General Description Figure 95 shows a simplified block diagram of the programmable universal dual phase locked loop (PLL) designed into the MC13110A/B and MC13111A/B IC. This dual PLL is fully programmable through the MCU serial interface and ...
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Loop Filter Characteristics Lets consider the following discussion on loop filters. The fundamental loop characteristics, such as capture range, loop bandwidth, lock–up time, and transient response are controlled externally by loop filtering. Figure 96 is the general model for a ...
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By substituting into equation (4), solve for T2 tan choosing a value for w p and and T2 can be calculated. The choice of Q ...
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LO may effect parameters like adjacent channel rejection and intermodulation. Figure 100 shows a loopfilter architecture incorporating an additional pole. Figure 100. Loop Filter with Additional Integrating Element From Phase Detector For the additional ...
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The K–factor shown determines how far the additional pole frequency will be separated from Selecting too small of a K–factor, the equations may provide negative capacitance or resistor values. Too large of a K–factor may not provide ...
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SERIAL PROGRAMMABLE INTERFACE Microprocessor Serial Interface The Data, Clock, and Enable (“Data”, “Clk”, and “EN” respectively) pins provide a MPU serial interface for programming the reference counters, the transmit and receive channel divide counters, the switched capacitor filter clock counter, ...
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Data Registers Figure 109 shows the data latch registers and addresses which are used to select each of each registers. Latch bits to the left (MSB) are loaded into the shift register first. The LSB bit must always be the ...
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Figure 110. Latch Register Power–Up Defaults Register Count T x 9966 – – 7215 – – 0 Ref 2048 – – 0 Mode N/A – Gain N/A – 0 ...
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Figure 113. Reference Counter Register Programming Mode Out U.K. Handset U.K. Base Select Select Figure 114. Reference Frequency and Divider Values Reference U.K. Base/ Crystal Divider Handset Frequency Value ...
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Power Saving Operating Modes When the MC13110A/B or MC13111A/B are used in a handset important to conserve power in order to prolong battery life. There are five modes of operation for the MC13110A/MC13111A; Active Standby, ...
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Power Saving Application – Option 2 (MC13110A and MC13111A Only) In some handset applications it may be desirable to power down all circuitry including the microprocessor (MPU). First put the MC13110A/MC13111A into the Inactive mode. This turns off the MPU ...
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Figure 120. Power Saving Application – Option 2 (MC13110A/MC13111A Only) MC13110A/ MC13111A MPU Clk Divider Mode Active Out/Hardware Interrupt MPU Clock Out Delay after MPU selects Inactive Mode to when CD turns off. MPU “Clk Out” Divider ...
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Figure 122. Clock Output Divider MPU Clk MPU Clk MPU Clk Bit #2 Bit #1 Bit # ...
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Gain Control Register The gain control register contains bits which control the T x Voltage Gain Voltage Gain, and Carrier Detect threshold. Operation of these latch bits are explained in Figures 124, 125 and 126 and ...
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Carrier Detect Threshold Programming The “CD Out” pin gives an indication to the microprocessor if a carrier signal is present on the selected channel. The nominal value and tolerance of the carrier detect threshold is given in the carrier detect ...
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Clock Divider/Voltage Adjust Register This register controls the divider value for the programmable switched capacitor filter clock divider, the low battery detect threshold select, the voltage reference adjust, and the scrambler bypass mode (MC13110A/B only). Operation is explained in Figures ...
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Figure 130. Low Battery Detect Equivalent Schematics Non–Programmable Threshold Mode: 52–QFP Package VB V ref 47 Programmable Threshold Mode: 48–LQFP Package MOTOROLA ANALOG IC DEVICE DATA MC13110A/B MC13111A/B Ref2 BD2 Out 50 16 Ref 1 BD1 Out ...
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Voltage Reference Adjustment An internal 1.5 V bandgap voltage reference provides the voltage reference for the “BD 1 Out” and “BD 2 Out” low battery detect circuits, the “PLL V ref ” voltage regulator, the “V B ” reference, and ...
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Figure 134. Corner Frequency Programming for 11.15 MHz 2nd LO MC13111A/B Total SCF Clock SCF Clock Divide Divider Value Freq. (kHz) Frequency (kHz 174.22 174. 168. 163. 159.29 ...
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Figure 137. First Local Oscillator Internal Capacitor Selection 1st LO 1st LO 1st LO 1st LO Cap. Cap. Cap. Cap. Bit 3 Bit 2 Bit 1 Bit ...
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OTHER APPLICATIONS INFORMATION PCB Board Lay–Out Considerations The ideal printed circuit board (PCB) lay out would be double–sided with a full ground plane on one side. The ground plane would be divided into separate sections to prevent any audio signal ...
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MC13110A/B MC13111A/B APPENDIX A MOTOROLA ANALOG IC DEVICE DATA Figure 138. ...
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Figure 139. Evaluation Board Bill of Materials for U.S. and French Application USA Application Handset RF (50 Ω) (50 Ω) Comp. Number INPUT MATCHING T1 n.m. C38 0.01 C39 0.01 10.7 MHz FILTER F1 ...
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Figure 140. 8128Z T2 0.10 62 MC13110A/B MC13111A/B APPENDIX B APPLICATIONS CIRCUIT C30 6800 0.10 C73 C74 k 10 R20 C19 0.1 MOTOROLA ANALOG IC DEVICE DATA ...
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Figure 140. Basic Cordless Telephone Transceiver Application Circuit (continued) Batt1 V+ V– Audio R54 100 k R53 68 k C60 µ 0.1 F R51 C38 110 k 8.0 R37 22 k R39 110 Data R41 ...
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APPENDIX C – MEASUREMENT OF COMPANDER ATTACK/DECAY TIME This measurement definition is based on EIA/CCITT recommendations. Compressor Attack Time For step up at the input, attack time is defined as the time for the output to settle ...
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DETAIL A –A– 0.20 (0.008 A–B 0.05 (0.002) A–B V 0.20 (0.008) C A– DETAIL C MOTOROLA ANALOG IC DEVICE DATA MC13110A/B MC13111A/B OUTLINE DIMENSIONS ...
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AB T– –T– –Z– 0.200 (0.008) AC T– –AB– –AC– AD BASE METAL Ç Ç Ç Ç É É É ...
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Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of ...
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