AM27C1024-70DC Advanced Micro Devices, AM27C1024-70DC Datasheet

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AM27C1024-70DC

Manufacturer Part Number
AM27C1024-70DC
Description
1 megabit CMOS EPROM
Manufacturer
Advanced Micro Devices
Datasheet

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Am27C1024
1 Megabit (65 K x 16-Bit) CMOS EPROM
DISTINCTIVE CHARACTERISTICS
GENERAL DESCRIPTION
The Am27C1024 is a 1 Megabit, ultraviolet erasable
programmable read-only memory. It is organized as 64
Kwords by 16 bits per word, operates from a single
+5 V supply, has a static standby mode, and features
fast single address location programming. Products are
available in windowed ceramic DIP packages, as well
as plastic one time programmable (OTP) PDIP and
PLCC packages.
Data can be typically accessed in less than 55 ns, al-
lowing high-performance microprocessors to operate
without any WAIT states. The device offers separate
Output Enable (OE#) and Chip Enable (CE#) controls,
BLOCK DIAGRAM
Fast access time
— Speed options as fast as 55 ns
Low power consumption
— 20 µA typical CMOS standby current
JEDEC-approved pinout
— 40-Pin DIP/PDIP
— 44-Pin PLCC
Single +5 V power supply
FINAL
A0–A15
Address
Inputs
PGM#
OE#
CE#
Output Enable
Chip Enable
Prog Logic
V
V
V
Decoder
Decoder
CC
SS
PP
and
Y
X
thus eliminating bus contention in a multiple bus micro-
processor system.
AMD’s CMOS process technology provides high
speed, low power, and high noise immunity. Typical
power consumption is only 125 mW in active mode,
and 100 µW in standby mode.
All signals are TTL levels, including programming sig-
nals. Bit locations may be programmed singly, in
blocks, or at random. The device supports AMD’s
Flashrite programming algorithm (100 µs pulses), re-
sulting in a typical programming time of 8 seconds.
100% Flashrite™ programming
— Typical programming time of 8 seconds
Latch-up protected to 100 mA from –1 V to
V
High noise immunity
Versatile features for simple interfacing
— Both CMOS and TTL input/output compatibility
— Two line control functions
10% power supply tolerance standard
CC
+ 1 V
Data Outputs
DQ0–DQ15
1,048,576
Buffers
Bit Cell
Output
Gating
Matrix
Y
Publication# 06780
Issue Date: May 1998
Rev: J Amendment/0
06780J-1

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AM27C1024-70DC Summary of contents

Page 1

... DIP/PDIP — 44-Pin PLCC Single +5 V power supply GENERAL DESCRIPTION The Am27C1024 Megabit, ultraviolet erasable programmable read-only memory organized as 64 Kwords by 16 bits per word, operates from a single +5 V supply, has a static standby mode, and features fast single address location programming. Products are ...

Page 2

... A15 A14 DQ12 7 A13 DQ11 8 A12 DQ10 9 A11 DQ9 10 A10 DQ8 DQ7 14 A7 DQ6 15 DQ5 16 A6 DQ4 06780J-2 LOGIC SYMBOL 16 Am27C1024 Am27C1024 -120 -150 -200 120 150 200 120 150 200 PLCC A0–A15 DQ0–DQ15 CE# (E#) PGM# (P#) OE# (G#) 06780J-4 -255 250 ...

Page 3

... Megabit ( 16-Bit) CMOS UV EPROM Valid Combinations AM27C1024-55 DC5, DC5B, DI5, DI5B AM27C1024- 5.0 V 10% CC DC, DCB, DI, DIB AM27C1024-70 AM27C1024-90 AM27C1024-120 AM27C1024-150 DC, DCB, DI, DIB, DE, DEB AM27C1024-200 AM27C1024-255 DC, DCB, DI, DIB OPTIONAL PROCESSING Blank = Standard Processing B VOLTAGE TOLERANCE See Product Selector Guide and Valid Combinations ...

Page 4

... J Valid Combinations AM27C1024-55 PC5, PI5, JC5, JI5 AM27C1024- 5.0 V 10% CC AM27C1024-70 AM27C1024-90 AM27C1024-120 JC, PC, JI, PI AM27C1024-150 AM27C1024-200 AM27C1024-255 OPTIONAL PROCESSING Blank = Standard Processing VOLTAGE TOLERANCE See Product Selector Guide and Valid Combinations TEMPERATURE RANGE C = Commercial ( + Industrial (– +85 C) ...

Page 5

... To accommodate multiple memory connections, a two-line control function provides: Low memory power dissipation, and Assurance that output bus contention will not occur. CE# should be decoded and used as the primary de- vice-selecting function, while OE# be made a common Am27C1024 0.25 V and PGM# LOW will program , and V between 12.5 V and 13 address line A9 ...

Page 6

... V tion of the capacitor should be close to where the power supply is connected to the array. CE# OE# PGM 0 voltage during programming. PP Am27C1024 to minimize transient effects. In addition, SS and V for each eight devices. The loca Outputs High High High High OUT D IN ...

Page 7

... Extended (E) Devices + 0.6 V Ambient Temperature (T CC Supply Read Voltages V for ± 5% devices . . . . . . . . . . +4. +5. for ± 10% devices . . . . . . . . . +4. +5. Operating ranges define those limits between which the func- tionality of the device is guaranteed. to –2 2.0 V for periods up to –2.0 V for SS Am27C1024 ) . . . . . . . . . . . + .– + .– +125 ...

Page 8

... OUT E Devices CE and removed simultaneously or after 0.5 V, which may overshoot –75 –50 – 06780J-5 Figure 2. Typical Supply Current vs. Temperature Am27C1024 Min Max 2.4 0.45 2 0.5 CC –0.5 +0.8 1.0 5.0 5 1.0 100 100 applied 2.0 V for periods less than 20 ns ...

Page 9

... V 1.5 V 0.45 V Output Note: For C = 100 pF. L INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Am27C1024 All -55 others 1 TTL gate L 30 100 20 0.0–3.0 0.45–2.4 1.5 0.8, 2.0 1.5 0.8, 2.0 2 ...

Page 10

... Min 0 , and removed simultaneously or after V PP 2.0 Addresses Valid 0 ACC (Note 1) after the falling edge of the addresses without impact CDV040 Test Conditions Typ OUT Am27C1024 Am27C1024 -70 -90 -120 -150 -200 -255 70 90 120 150 200 250 70 90 120 150 200 250 ...

Page 11

... BSC SIDE VIEW 21 .530 .580 20 SEATING PLANE .015 .014 .060 .022 Am27C1024 DATUM D .700 CENTER PLANE MAX 94 105 .300 BSC .600 BSC .008 .018 END VIEW 16-000038H-3 CDV040 DF11 3-30-95 ae .600 .625 ...

Page 12

... REF .032 TOP VIEW l REVISION SUMMARY FOR AM27C1024 Revision J Global Changed formatting to match current data sheets. Trademarks Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. ...

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