ISL6223CA Intersil Corporation, ISL6223CA Datasheet
ISL6223CA
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ISL6223CA Summary of contents
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... Fast Transient Recovery Time • Over Current Protection • High Ripple Frequency (Channel Frequency Times Number of Channels, Two .100kHz to 3MHz Ordering Information PART NUMBER TEMP. ( ISL6223CA ISL6223CA SSOP Tape and Reel ISL6223EVAL1 Evaluation Platform ISL6223EVAL2 Evaluation Platform Pinout ISL6223 (SSOP) 1 ...
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Block Diagram VSEN 0.9V 2.35V COMP DACOUT VID0 VID1 VID2 D/A VID3 VID4 FB 2 ISL6223 V PGOOD CC POWER-ON UV RESET (POR LATCH CLOCK AND S SAWTOOTH GENERATOR OVP + - + ¦ SOFT- START - ...
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Simplified Power System Diagram VSEN SYNCHRONOUS PWM 1 RECTIFIED BUCK CHANNEL ISL6223 SYNCHRONOUS PWM 2 RECTIFIED BUCK VID CHANNEL Functional Pin Descriptions 1 20 VID4 2 19 VID3 3 18 VID2 4 17 VID1 5 16 VID0 6 15 COMP ...
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Typical Application - Two Phase Converter Using HIP6601 Gate Drivers FB COMP VSEN V CC PGOOD PWM2 VID4 MAIN VID3 CONTROL VID2 ISL6223 VID1 ISEN2 VID0 PWM1 FS/DIS ISEN1 DACOUT GND Typical Application - Two Phase Converter Using a HIP6602 ...
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Absolute Maximum Ratings Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7V ...
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ERROR AMPLIFIER CORRECTION - ¦ PROGRAMMABLE REFERENCE + DAC ¦ AVERAGE - + ¦ ¦ CORRECTION FIGURE 1. SIMPLIFIED BLOCK DIAGRAM OF THE ISL6223 VOLTAGE AND CURRENT CONTROL LOOPS FOR ...
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Comparator to compensate for the detected “above average” current in that channel. Droop Compensation In addition to control of each power channel’s output current, the average channel current is also used to provide CORE voltage “droop” compensation. Average full channel ...
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The PGOOD output stage is made up of NMOS and PMOS transistors. On the rising V device becomes active slightly before the NMOS transistor pulls “down”, generating the slight rise in the PGOOD voltage. Note that ...
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Overcurrent In the event of an overcurrent condition, the overcurrent protection circuit reduces the average current delivered to less than 25% of the current limit. When an overcurrent condition is detected, the controller forces all PWM outputs into a three ...
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COMP FB SAWTOOTH ERROR GENERATOR AMPLIFIER CORRECTION + - + - REFERENCE DIFFERENCE DAC TO OTHER CHANNEL TO OVER CURRENT + - TRIP COMPARATOR FIGURE 8. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM SHOWING CURRENT AND VOLTAGE ...
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With a high dv/dt load transient, typical of high performance microprocessors, the largest deviations in output voltage occur at the leading and trailing edges of the load transient. In order to fully utilize the output-voltage tolerance range, the output voltage ...
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As discussed previously, the voltage drop across each Q2 transistor at the point in time when current is sampled is r (Q2 The voltage at Q2’s drain, the DS(ON) SAMPLE PHASE node, is applied through the R ...
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+ ...
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SINGLE CHANNEL 0.4 0.3 0.2 3 CHANNEL 0.1 4 CHANNEL 0 0.1 0.2 0.3 0 DUTY CYCLE (V FIGURE 14. CURRENT MULTIPLIER vs DUTY CYCLE The current from multiple channels tend to cancel each other and reduce the total ...
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... Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...