ISP1501 NXP Semiconductors, ISP1501 Datasheet

no-image

ISP1501

Manufacturer Part Number
ISP1501
Description
Manufacturer
NXP Semiconductors
Datasheet
1. General description
2. Features
The ISP1501 is a full-function transceiver designed to provide a Hi-Speed Universal
Serial Bus (USB) analog front-end to Application-Specific Integrated Circuits (ASICs)
and Field Programmable Gate Arrays (FPGAs) with a built-in USB Serial Interface
Engine (SIE). A Hi-Speed USB transceiver is integrated to implement USB
connectivity for high-speed peripherals. In addition, an Original USB transceiver
provides backward compatibility with full-speed USB systems. A minimum number of
external components is needed.
ISP1501
Hi-Speed Universal Serial Bus peripheral transceiver
Rev. 02 — 21 November 2002
Complies with Universal Serial Bus Specification Rev. 2.0
Legacy compliant Original USB full-speed transceiver interface
Bus-powered capability with suspend mode
Integrated parallel-to-serial converter (transmit) and serial-to-parallel converter
(receive) for Hi-Speed USB data
Hi-Speed USB data recovery upon receiving
Hi-Speed USB data synchronization upon transmitting
Integrated bit stuffing and de-stuffing for Hi-Speed USB data
Non-Return-to-Zero Inverted (NRZI) encoding and decoding for Hi-Speed
USB data
Integrated Phase Locked Loop (PLL) oscillator using 12 MHz crystal
Internal power-on reset
Separate 3.3 V supplies for analog transceiver and digital I/Os minimizes
crosstalk
3.3 V or 5 V tolerant digital input interface
16-bit bi-directional data bus allows FPGA verification, greatly reducing ASIC
implementation risk
Full industrial operating temperature range from 40 to 85 C
6 kV in-circuit ESD protection; compliant with IEC 61000-4-2 (level 3)
Available in LQFP48 package.
Product data

Related parts for ISP1501

ISP1501 Summary of contents

Page 1

... Hi-Speed Universal Serial Bus peripheral transceiver Rev. 02 — 21 November 2002 1. General description The ISP1501 is a full-function transceiver designed to provide a Hi-Speed Universal Serial Bus (USB) analog front-end to Application-Specific Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs) with a built-in USB Serial Interface Engine (SIE) ...

Page 2

... Product data Color printer Multi-functional printer Portable hard disk ® Zip drive ® Jaz drive Magneto-optical (MO) drive Optical drive (CD-ROM, CD-RW, DVD). Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Version 7 1.4 mm SOT313-2 © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...

Page 3

... NZRI BS 47 DECODER 46 39 TRANSCEIVER 29, 40 POWER 30, 41 SUPPLY 4, 10, 19 Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver ISP1501 9 RPU 7 DP HIGH-SPEED 6 DM FULL-SPEED 18 XTAL1 PLL OSCILLATOR 17 XTAL2 MGT059 © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...

Page 4

... State = 0, 1 — output enable for FS transceiver State = 2, 3 — transmission valid flag for HS transceiver 3 I reset input 4 - analog ground 1 supply 5 - analog supply voltage 1 (3 AI/O USB D connection (analog) with integrated 45 resistor Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver 36 DATA13 35 DATA12 34 DATA11 33 DATA10 32 DATA9 31 DATA8 DGND1 30 ...

Page 5

... O logic 0 — DATA[7:0] = valid data, DATA[15:8] = valid data logic 1 — DATA[7:0] = valid data, DATA[15:8] = bit stuff error byte 40 - digital supply voltage 2 (3.3 V) Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver series 5%) on Table 3 Table 3 Section 17 on application of this 1%) to © ...

Page 6

... TX_BS_EN to indicate different handling of the upper and lower data byte (see 43 O transmit ready output; a logic 1 means ISP1501 is ready to accept data on the next rising clock edge of CLKOUT30 I pin function depends on operating state (see State = 0, 1 — a logic 1 forces single-ended zero (SE0) for FS transmitter State = 2, 3 — ...

Page 7

... Philips Semiconductors 7. Functional description The ISP1501 supports both full-speed (FS) and high-speed (HS) USB physical layer for a Hi-Speed USB peripheral. An adaptive termination circuit ensures a correct 45 Calibration is done at power-on and after any operating state change. An internal bandgap reference circuit is used for generating the driver current and the biasing of the analog circuits ...

Page 8

... Table 9397 750 10025 Product data Section 17.1. Each set of latched data, including the 7, and the processed data is serially driven on the USB bus in HS signaling. 18. Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Section 10.1, Section 10.2 and Section terminations are disabled from © ...

Page 9

... V, 12 MHz clock 500 ppm, duty cycle between 40 and 60%) can also be used to drive pin XTAL1 (pin XTAL2 is left open). 8. Operating states 8.1 Interface and state selection The MODE1 and MODE0 pins control the operating states of the ISP1501 and select the appropriate function of multiplexed pins (see Table 3: MODE[1:0] ...

Page 10

... Philips Semiconductors Table 3: MODE[1:0] 8.2 State transitions A Hi-Speed USB peripheral handles more than one electrical state under the USB specification. The ISP1501 accommodates the various states through the MODE[1:0] input pins. Table 4: State 8.2.1 Disconnect state In the disconnect state (MODE[1:0] = 00), an external pull-up resistor on pin RPU is not connected to the DP line ...

Page 11

... Product data 5% is required on the DP line. This is implemented via the RPU resistor. The ISP1501 driver 5). ISP1501 HS current driver 45 Figure 6). Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Figure 4). 3 RPU 004aaa052 resistors on the DP and DM lines are 3 ...

Page 12

... RESET. The ASIC may not transmit or receive data while the ISP1510 RESET is driven LOW. 9397 750 10025 Product data Hi-Speed USB peripheral transceiver 9 ISP1501 current driver 45 45 004aaa040 Rev. 02 — 21 November 2002 ISP1501 3 RPU DP © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...

Page 13

... Full-speed receiving function Single-ended input > 200 mV > < 200 mV <0 < 200 mV <0.8 V Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver 3.3 V 1.5 k (1) ± RPU MGT063 VM Differential data (DP, DM) 1 full-speed K state ...

Page 14

... Connected in FS state and HS chirp state. Fig 8. High-speed transceiver functional diagram. 10.1 High-speed transmit The ISP1501 must be set in high-speed state by setting MODE[1:0] = 02H. High-speed data propagate to the DP and DM pins when the 16-bit input data bus is driven. Driving pin DDIR to logic 1 switches the 16-bit data bus to input mode. ...

Page 15

... Data0(L) 00H 00H TX_VALID CLKOUT30 TX_READY TX_BS_EN SYNC DATA [ 15:8 ] Data0(H) Data1(H) 00H 80H DATA [ 7:0 ] Data0(L) 00H 00H TX_VALID Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver (1) EOP Data2(H) Data3(H) FEH Data1(L) Data2(L) Data3(L) Data4(L) (1) Data2(H) Data3(H) XX EOP Data1(L) Data2(L) Data3(L) FEH © ...

Page 16

... Fig 12. HS transmit; 5-byte EOP ending on 16-bit boundary 10.2 High-speed receive When ISP1501 is in high-speed state (MODE[1:0] = 02H), setting input DDIR to logic 0 allows the HS receiver to output data to the external 16-bit bus. As the length of the incoming EOP is not fixed, RX_LAST_BYTE and RX_BS_ERROR are encoded to differentiate between EOP arriving on an 8-bit or a 16-bit boundary. RX_VALID qualifi ...

Page 17

... DATA [ 7:0 ] Data0(L) 00H RX_VALID CLKOUT30 RX_LAST_BYTE RX_BS_ERROR SYNC DATA [ 15:8 ] Data0(H) Data1(H) Data2(H) Data3(H) 80H DATA [ 7:0 ] Data0(L) 00H RX_VALID Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver EOP FEH Data1(L) Data2(L) Data3(L) Data4(L) MGT070 XX EOP Data1(L) Data2(L) Data3(L) FEH MGT073 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. ...

Page 18

... Data0(L) Data1(L) Data2(L) Data3(L) Data4(L) (1) Data0(H) Data1(H) Data2(H) Data3(H) Data4(H) 80H 00H Data0(L) Data1(L) Data2(L) Data3(L) Figure 17). Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver FFH XX FFH EOP FEH FFH FFH MGT075 EOP FEH FFH FFH Data4(L) Data5(L) FFH FFH MGT065 © ...

Page 19

... The total transmit path maximum delay bit times at 480 MHz. 9397 750 10025 Product data FFFFH 0000H ( 0000H FFFFH Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver FFFFH MGT200 HS IDLE 0000H MGT201 © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...

Page 20

... The receive path delay is between 106 to 122 HS bit times Figure 20 00H 00H 80H 80H 40H 106 to 122 HS bit times t B Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver XXXX MGT076 and 4080H MGT202 t C © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...

Page 21

... MHz will be aligned after pin RESET is driven from logic 1 to logic 0 (falling edge). During that one instance, the alignment causes the clock period to change. 9397 750 10025 Product data Hi-Speed USB peripheral transceiver Rev. 02 — 21 November 2002 ISP1501 © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...

Page 22

... A termination calibration occurs 4 s after a mode change and lasts for 2 s. RX_INACTIVE is asserted to facilitate calibration during this 2 s period. 9397 750 10025 Product data 10% termination resistance. The ISP1501 must not transmit or receive data Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver © ...

Page 23

... Conditions 1.8 V < V < 5 [1] I < pins DP, DM and ground pins other pins Conditions = unless otherwise specified. DGND amb Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Min Max 0.5 6.0 0.5 +4.6 0.5 6.0 - 100 4000 4000 2000 2000 40 125 ...

Page 24

... C; unless otherwise specified. DGND amb Conditions V V I(DP) I(DM) range DI pull- pull-down on DP, DM GND L squelch detected no squelch detected disconnect detected disconnect not detected V V I(DP) I(DM) Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Min Typ Max - - 0 0 CCD V 0 CCD - - ...

Page 25

... OH OL excluding the first transition from Idle state excluding the first transition from Idle state; see Figure 22 LOW-to-HIGH; see Figure 24 HIGH-to-LOW; see Figure 24 Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Min Typ Max 360 - 440 [1] 700 - 1100 ...

Page 26

... V OL MGT077 Fig 22. Timing DP, DM. 2 CRS logic input PHL(rcv) t PHL(se differential 1.5 V data lines V OL MGT079 Fig 24. Timing of VO, FSE0 to DP, DM. Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Min Typ Max - - [ ...

Page 27

... High-speed USB signals are characterized using eye patterns. For measuring the eye patterns 4 test points have been defined (see Specification Rev. 2.0 defines the eye patterns in several ‘templates’. For ISP1501 only Templates 1 and 4 are relevant. Fig 25. Eye pattern measurement planes. ...

Page 28

... Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Relative duration (% of unit interval) n.a. n.a. 7.5 92.5 37.5 62.5 37.5 62.5 MBL207 level 1 400 mV point 4 point 2 0 point 6 400 mV level 2 100 © ...

Page 29

... Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Relative duration (% of unit interval) n.a. n. d0(HSTX) MGT085 © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...

Page 30

... CLKOUT30 DATA [ 15:0 ] RX_VALID RX_LAST _BYTE RX_BS _ERROR DDIR Fig 29. Parallel digital interface timing: high-speed receive. 9397 750 10025 Product data 28. Conditions t d0(HSRX) t d1(HSRX) t d2(HSRX) t d3(HSRX) t su4(HSRX) Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Min Typ Max ...

Page 31

... V CCD1 , V CCD2 45 29 AGND1 to AGND3 4, 10 DGND1, DGND2 30, 41 11, 12 CLKOUT48 13 14 MGT061 series resistor and capacitor to this pin used in the Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Min Typ Max - - 6.8 ...

Page 32

... L test point handbook, halfpage D.U.T. test supply voltage V CCA DP D.U.T. DM AGND 143 inputs of a high-speed differential oscilloscope. outputs of a high-speed differential data generator. Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver (1) ± MGT081 Table 4 MGT082 15.8 50 coax (1) (2) 15 ...

Page 33

... 2 scale (1) ( 0.18 7.1 7.1 9.15 9.15 1.0 0.5 0.12 6.9 6.9 8.85 8.85 REFERENCES JEDEC EIAJ MS-026 Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver SOT313 detail X (1) ( 0.75 0.95 0.95 7 0.2 0.12 0.1 o 0.45 0.55 0.55 0 EUROPEAN ISSUE DATE ...

Page 34

... For packages with leads on four sides, the footprint must be placed angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. 9397 750 10025 Product data Hi-Speed USB peripheral transceiver Rev. 02 — 21 November 2002 ISP1501 © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...

Page 35

... Product data Suitability of surface mount IC packages for wave and reflow soldering methods [1] [4] , SO, SOJ Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Soldering method Wave Reflow not suitable suitable [3] not suitable ...

Page 36

... Modified the pin description for pin 20 – Pin 39: modified the pin description – Pin 42: modified the pin description – Pin 43 description, changed it to ISP1501 to make the description clearer 9397 750 10025 Product data 8.3: changed the second sentence. ...

Page 37

... Pin 48 description: changed the description for State = 2, 3. • Made the following changes in – Removed the first three paragraphs – Added the first sentence “The ISP1501 supports both full-speed (FS) and high-speed – Swapped the second and third paragraph – Added • ...

Page 38

... Philips Semiconductors Table 20: Revision history …continued Rev Date CPCN Description 02 20021121 Product data (9397 750 10025); supersedes Objective specification of ISP1501-01 of July 14th, 2000. Modifications (continued): • Added • In • In • In • In • Separated • In Also, changed the value of t • ...

Page 39

... Trademarks Jaz — registered trademark of Iomega Corp. Zip — registered trademark of Iomega Corp. Rev. 02 — 21 November 2002 ISP1501 Hi-Speed USB peripheral transceiver Fax: + 24825 © Koninklijke Philips Electronics N.V. 2002. All rights reserved ...

Page 40

... Hi-Speed USB peripheral transceiver 18 Application information . . . . . . . . . . . . . . . . . 31 19 Test information Package outline . . . . . . . . . . . . . . . . . . . . . . . . 33 21 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 21.1 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 21.2 Reflow soldering 21.3 Wave soldering 21.4 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 35 21.5 Package related soldering information . . . . . . 35 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . 36 23 Data sheet status Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 25 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 26 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 ISP1501 ...

Related keywords