SAA2505H NXP Semiconductors, SAA2505H Datasheet
SAA2505H
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SAA2505H Summary of contents
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... DATA SHEET SAA2505H DUET digital multichannel audio IC Preliminary specification Supersedes data of 1998 Mar 10 File under Integrated Circuits, IC01 INTEGRATED CIRCUITS 2001 Apr 05 ...
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... I C-bus Concealment of CRC errors SPDIF coded output Fully programmable SPDIF channel status information. 2001 Apr 05 APPLICATIONS The SAA2505H is intended for all markets where a multi-channel audio decoder for Dolby AC-3 and MPEG 2 2 S-bus outputs (slave is required Primary markets are for DVD video players, TV sets and ...
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... Machine model: equivalent to discharging a 200 pF capacitor through a 0 ORDERING INFORMATION TYPE NUMBER NAME SAA2505H QFP64 2001 Apr 05 CONDITIONS note 1 note 2 PACKAGE DESCRIPTION plastic quad flat package; 64 leads (lead length 1.6 mm); body Preliminary specification SAA2505H MIN. TYP. MAX. UNIT 3.0 3.3 3.6 V 160 mA 3.0 3.3 3.6 V tbf mA 35 MHz ...
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Acrobat reader. white to force landscape pages to be ... 2 I S-bus interface IEC 1397 bitstream IIS0 PARSER bitstream e.g. from IIS1 microphone ...
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... O SPDIF output S digital ground for I/O cells; note 5 S digital ground for internal logic and memories; note 2 S digital supply voltage for internal logic and memories (+3.3 V); note 3 5 Preliminary specification SAA2505H DESCRIPTION 2 S-bus) 2 S-bus) 2 S-bus) 2 S-bus) 2 ...
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... S digital supply voltage for internal logic and memories (+3.3 V); note 3 I hardware reset I select address input (I I serial clock input; external pull- I/O serial data input/output; external pull- Preliminary specification SAA2505H DESCRIPTION 2 S-bus) 2 S-bus) 2 S-bus) 2 S-bus) 2 S-bus) 2 ...
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... V DDDI 9 EFI1 10 EFI2 11 EFI3 12 V DDDE 13 WSO 14 SCK 15 V SSDE 16 2001 Apr 05 DESCRIPTION 2 C-bus) SAA2505H Fig.2 Pin configuration. 7 Preliminary specification SAA2505H 48 TMS TDI 47 V SSDE 46 45 ACLK V SSDA 44 43 CLKO 42 CLKI V DDA 41 V DDDE 40 39 SYSCLK V SSDE 38 V DDDI 37 ...
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... I C-bus data/control clock 2 The I C-bus control logic supports 400 kHz. This is supplied to pin 63 (SCL). If the SAA2505H is in the stand-alone mode (pin 1 HIGH C-bus clock needs to be supplied. Data sink clock The data sink clock source is dependant on the mode of 2 operation of the I S-bus output ports ...
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... SCK SD first WS write read SCK SD WS 2001 Apr 05 read MSB MSB 1 first read MSB MSB 1 second MGL327 2 Fig.3 I S-bus format (MSB fixed). read LSB 1 LSB second MGL328 Fig.4 EIAJ format (LSB justified). 9 Preliminary specification SAA2505H LSB 1 LSB LSB 1 LSB first ...
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... The user data can carry message lengths of 129 bytes. These are transmitted over the SPDIF port at a rate of 2 bits per stereo sample. The message buffer of 129 bytes is loaded via the I SAA2505H outputs all zeros for the user data. WORD SELECT SAMPLING FREQUENCY ...
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Acrobat reader. white to force landscape pages to be ... 2 Table 3 I C-bus control register MEMORY SECTION REGISTER NAME ADDRESS General SOFT_RESET ...
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Acrobat reader. white to force landscape pages to be ... MEMORY SECTION REGISTER NAME ADDRESS 2 I SCONTROL reserved $8 001- SCONTROL ...
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Acrobat reader. white to force landscape pages to be ... MEMORY SECTION REGISTER NAME ADDRESS Normal usage SPDIF1 CSBYTE0 $8 002-b15 to b8 SPDIF2 ...
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... C-bus and how to use it” can be obtained from Philips sales offices using ordering number 9398 393 40011. For the external control of the SAA2505H a fast I implemented. This is a 400 kHz bus which is downward compatible with the standard 100 kHz bus. There are two different types of control instructions: Instructions to control the DSP program ...
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... SDA SCL handbook, full pagewidth SDA SCL S START condition 2001 Apr 05 data line change stable; of data data valid allowed 2 Fig.5 Bit transfer on the I C-bus. Fig.6 START and STOP conditions. 15 Preliminary specification SAA2505H MBC621 SDA SCL P STOP condition MBC622 ...
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... ACK Fig.7 Data transfer on the START condition Fig.8 Acknowledge on the I 16 Preliminary specification SAA2505H acknowledgement signal from receiver ACK MBC601 2 C-bus. not acknowledge acknowledge 8 9 clock pulse for ...
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... S ( 62) LAVE ADDRESS SELECTION PIN The SAA2505H acts as slave receiver or a slave transmitter. Therefore the clock signal (SCL) is only an input signal. The data signal (SDA bidirectional line. The SAA2505H slave addresses are shown in Table 4. 2 Table 4 I ...
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... Special attention should be paid to the analog supply lines (V Boundary scan test interface The SAA2505H has a 5 pin boundary scan test interface which implements the three required commands of the IEEE1149; BYPASS, SAMPLE and EXTEST. The boundary scan test interface uses the following pins TDI (pin 47), TMS (pin 48), TCK (pin 49), TRST (pin 50) and TDO (pin 51) ...
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... Preliminary specification MIN. MAX. 0.3 +3.3 330 + 0 DDD < 0 0.3 V 500 +125 100 2000 +2000 300 +300 resistor. resistor. VALUE 45 MIN. TYP. 3 3.3 3 3.3 tbf tbf tbf 0.4 2.0 SAA2505H UNIT UNIT K/W MAX. UNIT 3.6 V 3.6 V tbf mA tbf mA tbf W 0 0.8 V ...
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... E, F and 3 DDD amb process = pin types E, F and 3 DDD amb process = start-up in operating range external crystal 20 Preliminary specification SAA2505H MIN. TYP. MAX. UNIT 2.4 V 0 tbf 3.6 ns tbf 3 ...
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... S-bus input S-bus input for standard mode I system t > 250 ns SU;DAT f = 400 kHz SCL f = 100 kHz SCL f = 400 kHz SCL 21 Preliminary specification SAA2505H MIN. MAX. 7.5 7.5 70 17.5 17.5 320 100 100 400 1.3 0.6 1.3 0.6 0.6 0 0.9 2 C-bus 100 ( ...
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... WS OUTPUT WS INPUT RIGHT t BCK( BCK T cy DATA INPUT DATA OUTPUT Fig.9 Timing definitions of the serial digital data inputs and outputs. 2001 Apr 05 t h;WS t BCK(L) t d;DAT LSB MSB 22 Preliminary specification LEFT t d;WS t s;WS t s;DAT t h;DAT SAA2505H MGL326 ...
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Acrobat reader. white to force landscape pages to be ... SDA t BUF t LOW t r SCL t HD;STA t HD;DAT P S ...
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... SDO2 SAA2505H SCKO3 WSO3 SDO3 SDBO3 SPDIF SDB V DDD V DDDA V SSDA RESET TRST CLKI CLKO 40.5 MHz 3.3 V Fig.11 Application diagram for SAA2505H. SYSCLK DAC SCK WS L/R SD SYSCLK DAC SCK WS LS/RS SD SYSCLK DAC SCK WS C/LFE SD SYSCLK DAC SCK WS LC/RC SD ...
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... scale (1) ( 0.45 0.23 14.1 14.1 17.45 0.8 0.30 0.13 13.9 13.9 16.95 REFERENCES JEDEC EIAJ MS-022 25 Preliminary specification detail 17.45 1.03 1.60 0.16 0.16 0.10 16.95 0.73 EUROPEAN PROJECTION SAA2505H SOT393 (1) ( 1.2 1 0.8 0.8 0 ISSUE DATE 99-12-27 00-01-19 ...
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... Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 26 Preliminary specification SAA2505H ...
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... MPEG-2 Standard is expressly prohibited without a license under applicable patents in the MPEG-2 patent portfolio, which license is available from MPEG LA, L.L.C., 250 Steele Street, Suite 300, Denver, Colorado 80206. 27 Preliminary specification SAA2505H DEFINITIONS These products are not Philips Semiconductors Use of this product in ...
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... I Philips. This specification can be ordered using the code 9398 393 40011. 2001 Apr components conveys a license under the Philips’ system provided the system conforms to the I 28 Preliminary specification SAA2505H 2 C patent to use the 2 C specification defined by ...
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... Philips Semiconductors DUET digital multichannel audio IC 2001 Apr 05 NOTES 29 Preliminary specification SAA2505H ...
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... Philips Semiconductors DUET digital multichannel audio IC 2001 Apr 05 NOTES 30 Preliminary specification SAA2505H ...
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... Philips Semiconductors DUET digital multichannel audio IC 2001 Apr 05 NOTES 31 Preliminary specification SAA2505H ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + 101 ...