ADP3410KRU Analog Devices, ADP3410KRU Datasheet
ADP3410KRU
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ADP3410KRU Summary of contents
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... The quiescent current, when the device is disabled, is less than 10 mA. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices ...
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ADP3410–SPECIFICATIONS Parameter SUPPLY Supply Voltage Range Quiescent Current Shutdown Mode Operating Mode VCCGD OUTPUT Output Voltage High Output Voltage Low 2, 3 VCCGD Propagation Delay (See Figure 4) SYNCHRONOUS RECTIFIER MONITOR Output Voltage High Output Voltage Low 2 Transition Time ...
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... 4 4 DRVL, CC LOAD tf DRVL tpdh V = 4.6 V DRVL CC tpdl DRVL ). DLY Model ADP3410KRU 0∞C to 85∞C –3– ADP3410 Min Typ Max 2 ORDERING GUIDE Temperature Package Package Range Description Option Thin Shrink Small RU-14 Outline Package ...
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ADP3410 Pin Mnemonic Function 1 OVPSET Overvoltage Shutdown Sense Input. Shutdown occurs when this pin is driven above the specified thresh- old high-impedance comparator input external resistor divider can be used to scale the controlling ...
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VCC SD VCCGD DLY C DLY IN Ra OVPSET V OUT Rb DRVLSD IN DRVLSD DRVL REV BIAS ENABLE V CC VCC UVLO 4.4V DRVL DELAY 10 1.2V 1V GND Figure 2. Functional Block Diagram ...
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ADP3410 SD VCCGD V CC VCCGD IN tpdl DRVL 90% DRVL DRVH- tpdh VCCGD 3.5V Figure 4. VCCGD Propagation Delay UVLO THRESHOLD tpdh UVLO 10 Figure 5. UVLO Propagation Delay tf DRVL 10% tpdh tr DRVH ...
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DRVH DRVL 3nF LOAD 20ns/DIV SW TIME – ns TPC 1. DRVH Fall and DRVL Rise Times 3nF LOAD 30 25 RISE ...
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ADP3410 THEORY OF OPERATION The ADP3410 is a dual MOSFET driver optimized for driving two N-channel FETs in a synchronous buck converter topology. A single PWM input signal is all that is required to properly drive the high-side and the ...
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Synchronous Rectifier Monitor The synchronous rectifier monitor provides a TTL output signal for use by the PWM controller. The SRMON output follows the DRVL signal when the low-side driver is enabled and goes high when the low-side driver is shut ...
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ADP3410 Printed Circuit Board Layout Considerations Use the following general guidelines when designing printed circuit boards: 1. Trace out the high-current paths and use short, wide traces to make these connections. 2. Split the ground connections. Use separate planes for ...
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COPLANARITY Revision History Location Data Sheet changed from REV REV. A. Change Figures to TPCs . . . . . . . . . . . . . . . . . . . . . . . ...
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ADP3410 –12– REV. A ...