TDA9962HL NXP Semiconductors, TDA9962HL Datasheet

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TDA9962HL

Manufacturer Part Number
TDA9962HL
Description
Manufacturer
NXP Semiconductors
Datasheet
1. Description
2. Features
3. Applications
The TDA9962 is a 12-bit analog-to-digital interface for CCD cameras. The device
includes a correlated double sampling circuit, PGA, clamp loops and a low-power
12-bit ADC together with its reference voltage regulator.
An internal CDS input buffer is incorporated in order to avoid using an external buffer
that would consume more power and therefore optimizing the application for low
noise, low power working.
The PGA gain and the ADC input clamp level are controlled via the serial interface.
An additional DAC is provided for additional system controls; its output voltage range
is 1.0 V (p-p) which is available at pin OFDOUT.
TDA9962
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD
cameras
Rev. 03 — 12 September 2002
Internal CDS input buffer, Correlated Double Sampling (CDS), Programmable
Gain Amplifier (PGA), 12-bit Analog-to-Digital Converter (ADC) and reference
regulator included
Fully programmable via a 3-wire serial interface
Sampling frequency up to 30 MHz
PGA gain range of 36 dB (in steps of 0.1 dB)
Low power consumption of only 115 mW at 2.7 V
Power consumption in standby mode of 4.5 mW (typ.)
3.0 V operation and 2.2 to 3.6 V operation for the digital outputs
All digital inputs accept 5 V signals
Active control pulses polarity selectable via serial interface
8-bit DAC included for analog settings
TTL compatible inputs, CMOS compatible outputs.
Low-power, low-voltage CCD camera systems.
Preliminary data

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TDA9962HL Summary of contents

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TDA9962 12-bit, 3 Msps analog-to-digital interface for CCD cameras Rev. 03 — 12 September 2002 1. Description The TDA9962 is a 12-bit analog-to-digital interface for CCD cameras. The device includes a correlated double sampling circuit, PGA, clamp loops ...

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... P total power consumption tot 5. Ordering information Table 2: Ordering information Type number Package Name TDA9962HL LQFP48 9397 750 10167 Preliminary data 12-bit, 3 Msps analog-to-digital interface for CCD cameras Conditions all clamps active MHz pF; input ramp of pix ...

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V CCA1 SHP SHD AGND1 CDS CLOCK GENERATOR 8 CPCDS1 9 CPCDS2 7 V CCA2 input buffer 3 AGND2 CORRELATED 4 IN DOUBLE SAMPLING SHIFT ...

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... CPCDS1 CPCDS2 DCLPC OFDOUT TEST AGND5 V CCA3 9397 750 10167 Preliminary data 12-bit, 3 Msps analog-to-digital interface for CCD cameras TDA9962HL Pin description Pin Description 1 analog supply voltage 1 2 analog ground 1 3 analog ground 2 4 ...

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Philips Semiconductors Table 3: Symbol V CCA4 V CCA5 SDATA SCLK SEN VSYNC V CCD1 DGND1 V CCO1 OGND1 D10 D11 OGND2 V CCO2 OE AGND6 V CCA6 STDBY BLK ...

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Philips Semiconductors 8. Limiting values Table 4: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V analog supply voltage CCA V digital supply voltage CCD V digital outputs supply voltage CCO V supply voltage ...

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Philips Semiconductors 10. Characteristics Table 6: Characteristics 3 2 CCA CCD CCO Symbol Parameter Supplies V analog supply voltage CCA V digital supply voltage CCD V digital outputs supply CCO voltage ...

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Philips Semiconductors Table 6: Characteristics …continued 3 2 CCA CCD CCO Symbol Parameter t CDS input hold time h(IN;SHP) (pin IN) compared to control pulse SHP t CDS input hold time ...

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Philips Semiconductors Table 6: Characteristics …continued 3 2 CCA CCD CCO Symbol Parameter Digital outputs ( MHz pF); see pix L V HIGH-level output voltage I ...

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IN N SHP 0 h(IN;SHP) SHD 0 h(IN;SHD) 2.0 V CLK t d(SHD;CLK DATA BLK SHP and SHD should be aligned at optimum with the CCD ...

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IN N 2.0 V SHP t h(IN;SHP) 2.0 V SHD t h(IN;SHD) CLK 0 CLKL N 4 DATA BLK SHP and SHD should be aligned at optimum with the CCD ...

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Philips Semiconductors Fig 5. DAC voltage output as a function of DAC input code. PGAOUT VIDEO CLPOB (active HIGH) CLPDM (active HIGH) BLK (active HIGH) Fig 6. Line frequency timing diagram. 9397 750 10167 Preliminary data 12-bit, 3 ...

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Philips Semiconductors PGAcode Gain ------------------------ - dB 383 Full-scale at the ADC input is reached use 36 dB gain range refer to Table Fig 7. Total gain from CDS input to ADC ...

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Philips Semiconductors SDATA SD0 SCLK LSB SEN 8 PGA GAIN OFDOUT DAC LATCHES LATCHES FLIP-FLOP FLIP-FLOP 8-bit DAC PGA control First logic layer (DFF) is clocked by the first falling SCLK edge after the rising SEN edge. Second logic layer ...

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Philips Semiconductors Table 7: Address bits other addresses Table 8: Symbol SHP and SHD CLK CLPDM CLPOB BLK VSYNC Table 9: Bit SD7 of register 0011 1 0 Table 10: Output enable selection using ...

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Philips Semiconductors 11. Application information (2)(3) CCD CCA 100 nF V CCA 100 (1) Pins SEN and VSYNC should be interconnected when vertical sync signal is not available. (2) Input signals IN, ...

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Philips Semiconductors CCD HORIZONTAL AND VERTICAL DRIVER (1) The external input buffer can be omitted for CCDs with low output impedance, for CCDs with high output impedance, a small current (around 1 mA) is needed. Fig 12. Typical imaging application. ...

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Philips Semiconductors 11.1 Power and grounding recommendations Care should be taken to minimize the noise when designing a printed-circuit board for applications such as PC cameras, surveillance cameras, camcorders and digital still cameras. For the front-end integrated circuit, the basic ...

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Philips Semiconductors 12. Package outline LQFP48: plastic low profile quad flat package; 48 leads; body 1 pin 1 index DIMENSIONS (mm are ...

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Philips Semiconductors 13. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe desirable to take normal precautions appropriate to handling integrated circuits. 14. Soldering 14.1 Introduction to soldering surface ...

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Philips Semiconductors The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed angle to the transport direction of the printed-circuit board. The footprint must ...

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Philips Semiconductors 15. Revision history Table 12: Revision history Rev Date CPCN Description 03 20020912 - Preliminary specification; third version 02 20000804 - Objective specification; second version 01 20000501 - Objective specification; initial version 9397 750 10167 Preliminary data 12-bit, ...

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Philips Semiconductors 16. Data sheet status [1] [2] Data sheet status Product status Objective data Development Preliminary data Qualification Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product ...

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Philips Semiconductors Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . ...

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