MC68360 Freescale Semiconductor, Inc, MC68360 Datasheet
MC68360
Available stocks
Related parts for MC68360
MC68360 Summary of contents
Page 1
... SCCs, two serial management controllers (SMCs), and one serial peripheral interface (SPI). QUICC Key Features The following list summarizes the key MC68360 QUICC features: • CPU32+ Processor (4.5 MIPS at 25 MHz) — 32-Bit Version of the CPU32 Core (Fully Compatible with the CPU32) — ...
Page 2
... Freescale Semiconductor, Inc. Memory (SRAM), Electrically Programmable Read-Only Memory (EPROM), Flash EPROM, etc. — Four CAS lines, Four WE lines, One OE line — Boot Chip Select Available at Reset (Options for 8-, 16-, or 32-Bit Memory) — Special Features for MC68040 Including Burst Mode Support • ...
Page 3
... Freescale Semiconductor, Inc. • Four SCCs — Ethernet/IEEE 802.3 Optional on SCC1 (Full 10-Mbps Support) (Available only on the MC68EN360) ™ — HDLC/SDLC (All Four Channels Supported at 2 Mbps) — HDLC Bus (Implements an HDLC-Based Local Area Network (LAN)) — AppleTalk ® — Signaling System #7 — ...
Page 4
... Although the IMB definition always included an option for an on-chip 32-bit bus, the QUICC is the first device to implement this option. The QUICC is comprised of three modules: the CPU32+ core, the SIM60, and the CPM. Each module utilizes the 32-bit IMB. The MC68360 QUICC block diagram is shown in Figure 1. CPU32+ CORE ...
Page 5
... System Integration Module (SIM60) The SIM60 integrates general-purpose features that would be useful in almost any 32-bit processor system. The term “SIM60” is derived from the QUICC part number, MC68360. The SIM60 is an enhanced version of the SIM40 that exists on the MC68340 and MC68330 devices. ...
Page 6
... Freescale Semiconductor, Inc. The four general-purpose timers on the QUICC are functionally similar to the two general-purpose timers found on the MC68302. However, they offer some minor enhancements, such as the internal cascading of two timers to form a 32-bit timer. The QUICC also contains a periodic interval timer in the SIM60, bringing the total to five on-chip timers ...
Page 7
... Freescale Semiconductor, Inc. offers many more functions than even a 240-pin package would normally allow, resulting in more multifunctional pins than the MC68302. Software Compatibility Issues The following list summarizes the major software differences between the MC68302 and the QUICC: • Since the CPU32 superset of the M68000 instruction set, all previously written code will run. ...
Page 8
... Freescale Semiconductor, Inc. QUICC MC68360 ADDRESS CAS3–CAS0 PRTY3–PRTY0 Figure 2. Minimum QUICC System Configuration Figure 3 shows a larger system configuration. This system offers one EPROM, one flash EPROM, and supports two DRAM SIMMs. Depending on the capacitance on the system bus, external buffers may be required ...
Page 9
... Freescale Semiconductor, Inc. QUICC MC68360 CS0 OE WE0 DATA ADDRESS CS7 WE3–WE0 RAS2 RAS1 CAS3–CAS0 R/W PRTY3–PRTY0 Figure 3. Larger QUICC System Configuration QUICC Serial Configurations The QUICC offers an extremely flexible set of communications capabilities. Although a full understanding of For More Information On This Product, ...
Page 10
... Freescale Semiconductor, Inc. Figure 4. Ethernet LAN Capability Figure 5 shows how up to six of the serial channels can connect to a TDM interface. The QUICC provides a built-in time-slot assigner for access to the TDM time slots. Other channels can work with their own set of pins, allowing possibilities like an Ethernet to T1 bridge, etc. ...
Page 11
... Freescale Semiconductor, Inc. SCC SCC SCC SCC SMC SMC ANY COMBINATION OF SCCs CONNECTED TO ANY TDM. NOTE: Two TDM buses may be simultaneously supported Figure 6. Dual TDM Bus Implementation QUICC Serial Configuration Examples Figure 7 shows a general-purpose application that includes Ethernet, AppleTalk, an HDLC connection line, an HDLC connection to frame relay, a UART debug monitor port, a totally transparent data stream port, and an SPI connection to a serial EEPROM ...
Page 12
... Freescale Semiconductor, Inc. QUICC MASTER CPU32+ Figure 8. Master-Slave QUICC Implementation The QUICC has special features in slave mode to support the M68040 family. When the QUICC is used in this way said MC68040 companion mode. Figure 9 shows how a QUICC in slave mode can interface to a MC68EC040. (The MC68EC040 is a low-cost version of the MC68040 with identical integer performance, but without the memory management unit (MMU) and the floating-point unit (FPU) ...
Page 13
... Freescale Semiconductor, Inc. MC68EC040 SYSTEM BUS CONTROL Figure 9. MC68040 Companion Mode For More Information On This Product, Go to: www.freescale.com QUICC SLAVE MC68EC040 SUPPORT FUNCTIONS CPU32+ SCC SCC SCC SCC SMC SMC MEMORY SPI CONTROLLER EPROM DRAM ADDRESS MUXs SRAM ...
Page 14
... Pin Grid Array (RC Suffix) Pin Grid Array with Ethernet Pin Grid Array with Ethernet The documents listed in the following table contain detailed information on the MC68360. These documents may be obtained from the Literature Distribution Centers at the addresses listed at the bottom of this page. ...