DSP56301 Motorola, DSP56301 Datasheet
DSP56301
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DSP56301 Summary of contents
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor General remark: In order to prevent the use of instructions or sequences of instructions that do not operate correctly, we encourage you to use the “lint563” program to identify such cases and use alternative sequences of instructions. This program is available as part of the Motorola DSP Tools CLAS package. ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Documentation Errata Errata Document Update Number Description (revised 11/9/98): XY memory data move does not work properly if the X-memory move destination is internal I/O and the Y-memory move source is a register used as destination in the previous adjacent move from non Y-memory OR the Y-memory move destination is a register used as source in the next adjacent move to non Y-memory ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 10/09/1997): The following instructions should not start at address LA: MOVE to/from Program space {MOVEM, MOVEP (only the P ED4 space options)} This is not a bug but a documentation update (Appendix B, DSP56300 Family Manual). ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 1/27/98): When the SCI is configured in Synchronous mode, internal clock, and all the SCI pins are enabled simultaneously, an extra pulse of 1 DSP clock length is provided on the SCLK pin. Workaround: ED9 a ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 5/15/98): When the HI32 is in PCI mode, the Insert Address Enable control ED13 bit (IAE=1) can be set only with the Receive Buffer Lock Enable control bit set (RBLE=1 in the DPCR register.) ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 11/24/98): In the Technical Datasheet Voh-TTL should be listed at 2.4 Volts, not as: ED20 TTL = Vcc-0.4 Workaround: This is a documentation update. Description (added 11/24/98): In the Technical Datasheet Iol should be listed as 1.6 mA, not as 3.0 mA. ED21 Workaround: This is a documentation update ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 12/16/98): Current definition: HDTC is set if SRRQ and MRRQ are cleared (i.e. the host-to-DSP data path is emptied by DSP56300 core reads) under one of the following conditions: • a non-exclusive PCI write transaction to the HTXR termi- nates or completes • ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 1/6/99): The specification DMA Chapter is wrong. “Due to the DSP56300 Core pipeline, after DE bit in DCRx is set, the corresponding DTDx bit in DSTR will be cleared only after two ED26 instruction cycles.” ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 1/7/1997; identified as Documentation Errata 2/1/99): When two consecutive LAs have a conditional branch instruction at LA-1 of the internal loop, the part does not operate properly. For example, the following sequence may generate incorrect results: ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 9/12/1997; identified as a Documentation errata 2/1/99): When the ESSI transmits data in the On-Demand mode (i.e., MOD = 1 in CRB and DC[4:0] = $00000 in CRA) with WL[2:0] = 100, the transmission does not work properly. ED30 ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 12/16/98; identified as a Documentation errata 2/1/99): When Stack Extension mode is enabled, a use of the instructions BRKcc or ENDDO inside do loops might cause an improper operation. If the loop is non nested and has no nested loop inside it, the erratais relevant only values are being used outside the loop ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number nop_before_label2 label2 ..... ..... label1 .... .... fix_brk_routine move #1,lc jmp ENDDO ------ Original code: do #M,label1 ..... ..... ED33 cont. label2 ..... ..... label1 Will be replaced by: do #M, label1 ..... ..... DSP56301 Errata For More Information On This Product, 1996-2002, Motorola Chip Errata ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number nop_after_jmp label2 ..... ..... label1 .... .... fix_enddo_routine move #1,lc move #nop_after_jmp,la jmp 2) DO FOREVER loops =================== ED33 cont. BRKcc ----- Original code: do #M,label1 ..... ..... label2 ..... ..... label1 DSP56301 Errata For More Information On This Product, 1996-2002, Motorola Chip Errata ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Will be replaced by: do #M,label1 ..... ..... note: JScc and not Jcc nop_before_label2 label2 ..... ..... ED33 cont. label1 .... .... fix_brk_forever_routine move ssh,x:<..> address (for temporary data) move #nop_before_label2,ssh bclr #16,ssl move #1,lc rti ENDDO ------ Original code: do #M,label1 ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number label2 label1 Will be replaced by: do #M,label1 ..... ..... ED33 cont. JSR and not JMP nop_after_jmp NOP ..... ..... label2 ..... ..... label1 .... .... fix_enddo_routine Pertains to: DSP56300 Family Manual, Section B-4.2, “General Do Restrictions.” DSP56301 Errata For More Information On This Product, ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 1/5/99; identified as a Documentation errata 2/1/99): When stack extansion is enabled, the read result from stack may be improper if two previous executed instructions cause sequential read and write operations with SSH. Two cases are possible: ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 4/19/99): In paragraph 6.1.1.11 on page 6-12 of the 301 User’s Manual, there is an error, as follows: "HIRQ_ is asserted by the HI32 when a host interrupt request (recieve and/or transmit) is generated in the HI32" ED37 Workaround/correction: Should be: " ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added 11/11/99): When an instruction with all the following conditions follows a repeat instruction, then the last move will be corrupted.: 1. The repeated instruction is from external memory. 2. The repeated instruction is a DALU instruction that includes 2 DAL registers, one as a source, and one as destination (e ...
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... Freescale Semiconductor, Inc. DSP56301 Digital Signal Processor Errata Document Update Number Description (added on 3/22/2000) The DMA End-of-Block-Transfer interrupt cannot be used if DMA is operating in the mode in which DE is not cleared at the end of the block transfer (DTM = 100 or 101). ED42 Pertains to: DSP56300 Family Manual, Rev. 2, Section 10.4.1.2, “End-of-Block- Transfer Interrupt.” ...
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... HSTR{HF5,HF4,HF3} can be set in any combinations that distinguish between HCVR and HSTR data reads. Pertains to: DSP56301 User’s Manual: Put this errata text as a note in the description of the HCTR (p. 6-48), the HSTR (p. 6-57), and the HCVR (p. 6-59). These page numbers are for Revision 3 of the manual. ...
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... OnCE is a trademark of Motorola, Inc. NOTES 1. An over-bar (i.e., xxxx) indicates an active-low signal. 2. The letters seen to the right of the errata tell which DSP56301 mask numbers apply. 3. The Motorola DSP website has additional documentation updates that can be accessed at the following URL: http://www.motorola-dsp.com/ 4 ...