M5M54R08AJ-12 MITSUBISHI, M5M54R08AJ-12 Datasheet

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M5M54R08AJ-12

Manufacturer Part Number
M5M54R08AJ-12
Description
4194304-bit (524288-word by 8-bit) CMOS static RAM
Manufacturer
MITSUBISHI
Datasheet
•Fast access time
•Single +3.3V power supply
•Fully static operation : No clocks, No refresh
•Common data I/O
•Easy memory expansion by S
•Three-state outputs : OR-tie capability
•OE prevents data contention in the I/O bus
•Directly TTL compatible : All inputs and outputs
DESCRIPTION
The M5M54R08AJ is a family of 524288-word by 8-bit
static RAMs, fabricated with the high performance CMOS
silicon gate process and designed for high speed
application.
directly TTL compatible. They include a power down
feature as well.
FEATURES
APPLICATION
High-speed memory units
address
These devices operate on a single 3.3V supply, and are
inputs
BLOCK DIAGRAM
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change
OE 31
W
S
A
A
A
A
A
A
A
A
A
A
0
1
2
3
4
6
7
8
5
9
14
15
16
17
18
13
1
2
3
4
5
6
M5M54R08AJ-12
M5M54R08AJ-15
M5M54R08AJ-10
1998.11.30 Ver..B
...
...
...
12ns(max)
15ns(max)
10ns(max)
COLUMN INPUT BUFFERS
A
COLUMN I/O CIRCUITS
20 21 22 23 24
10
COLUMN ADDRESS
COLUMN
ADDRESS
MEMORY ARRAY
A
4096 COLUMNS
11
DECODERS
DECODERS
1024 ROWS
address inputs
A
12
MITSUBISHI
ELECTRIC
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
A
13
A
14
PACKAGE
A
32 33
data inputs/
outputs
PIN CONFIGURATION (TOP VIEW)
chip select
write control
M5M54R08AJ
input
input
15
address
data
inputs/
outputs
inputs
address
inputs
A
16
(3.3V)
34 35
A
(0V)
16
M5M54R08AJ-10,-12,-15
A
17
V
GND
DQ
DQ
DQ
DQ
CC
A
W
A
A
A
A
S
A
A
A
A
A
4
0
1
2
3
5
6
7
8
9
1
2
3
4
Outline
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
: 36pin 400mil SOJ
36P0K (SOJ)
MITSUBISHI LSIs
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
OE
GND
11
12
25
26
29
30
V
DQ
DQ
A
A
A
A
A
NC
DQ
NC
10
A
A
A
A
DQ
8
27
28
7
9
CC
14
13
12
11
10
18
17
16
15
6
5
8
7
VCC
DQ
DQ
DQ
DQ
DQ
GND
DQ
DQ
DQ
output enable
input
(0V)
(3.3V)
address
address
inputs
data
inputs/
outputs
inputs
1
2
3
4
6
5
7
8
data
inputs/
outputs
data
inputs/
outputs
(3.3V)
(0V)
1

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M5M54R08AJ-12 Summary of contents

Page 1

... These devices operate on a single 3.3V supply, and are directly TTL compatible. They include a power down feature as well. FEATURES •Fast access time M5M54R08AJ-10 M5M54R08AJ-12 M5M54R08AJ-15 •Single +3.3V power supply •Fully static operation : No clocks, No refresh •Common data I/O •Easy memory expansion by S •Three-state outputs : OR-tie capability • ...

Page 2

... FUNCTION The operation mode of the M5M54R08AJ is determined by a combination of the device control inputs S, W and OE. Each mode is summarized in the function table. A write cycle is executed whenever the low level W overlaps with the low level S. The address must be set-up before the write cycle and must be stable during the entire cycle ...

Page 3

... O O (Ta=0~70 , Vcc=3.3V °C V =3.0V ........................ V =1.5V ................. V =1.5V Fig.1,Fig Fig.2 Output load for MITSUBISHI ELECTRIC MITSUBISHI LSIs M5M54R08AJ-10,-12,-15 Limit Min Typ Max 7 8 +10% ,unless otherwise noted) -5% =0.0V IL 3ns =1.5V IL =1.5V OL 5.0V 480 5pF (including 255 scope and JIG) en dis ...

Page 4

... BY 8-BIT) CMOS STATIC RAM Limits M5M54R08AJ-10 M5M54R08AJ-12 Max Max Min Min Limits M5M54R08AJ-10 M5M54R08AJ-12 Min Max Min Max ...

Page 5

... Transition is measured ±500mv from steady state voltage with specified loading in Figure 2. Read cycle 3 (Note 1 W=H S=L Note 5. Addresses and S valid prior to OE transition low by (ta(A)-ta(OE)), (ta(S)-ta(OE)) M5M54R08AJ-10,-12,-15 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM (A) tv (A) UNKNOWN (S) (Note 4) ten (S) UNKNOWN ...

Page 6

... DATA STABLE t dis (Note 4) (W) t dis (OE) Hi tsu (S) tsu ( ( (Note 6) tsu (D) IH DATA STABLE IL t dis (W) ten (S) (Note 4) (Note 4) OH Hi-Z OL (Note 7) MITSUBISHI ELECTRIC MITSUBISHI LSIs M5M54R08AJ-10,-12,-15 (Note 6) ten (Note 4) (OE) ten (W) trec (W) (Note 6) th (D) 6 ...

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