M5M5408BFP-55HI MITSUBISHI, M5M5408BFP-55HI Datasheet
M5M5408BFP-55HI
Available stocks
Related parts for M5M5408BFP-55HI
M5M5408BFP-55HI Summary of contents
Page 1
... Three-state outputs: OR-tie capability STSOP) and • OE prevents data contention in the I/O bus • Process technology: 0.25µm CMOS • Package: M5M5408BFP: 32 pin 525 mil SOP M5M5408BTP/RT: 32 pin 400 mil TSOP(ll) M5M5408BKV/KR: 32 pin 8mm x 13.4mm STSOP Access Stand-by current Icc Power typical * ...
Page 2
... M5M5408BFP/TP/RT/KV/KR PIN CONFIGURATION (TOP VIEW GND (0V) 16 Outline 32P2M-A (FP) 32P3Y-H (TP ...
Page 3
... M5M5408BFP/TP/RT/KV/KR FUNCTION The M5M5408BFP,TP,RT,KV,KR is organized as 524,288- words by 8-bit. These devices operate on a single +5.0V power supply, and are directly TTL compatible to both input and output. Its fully static circuit needs no clocks and no refresh, and makes it useful. A write operation is executed during the S low and W low overlap time ...
Page 4
... M5M5408BFP/TP/RT/KV/KR ABSOLUTE MAXIMUM RATINGS Symbol Parameter Supply voltage V cc Input voltage Output voltage O P Power dissipation d Operating T a temperature T Storage temperature stg DC ELECTRICAL CHARACTERISTICS Symbol Parameter High-level input voltage Low-level input voltage IL V High-level output voltage 1 OH1 V High-level output voltage 2 ...
Page 5
... CL Including scope and jig capacitance Fig.1 Output load Limits M5M5408BFP,TP,RT, M5M5408BFP,TP,RT, KV,KR-55 KV,KR-70 Max Min Max Min 100 Limits M5M5408BFP,TP,RT, M5M5408BFP,TP,RT, KV,KR-55 KV,KR-70 Max Min Max Min 70 100 ...
Page 6
... M5M5408BFP/TP/RT/KV/KR (4)TIMING DIAGRAMS Read cycle A 0~18 S (Note3) OE (Note3 "H" level DQ 1~8 Write cycle ( W control mode ) A 0~18 S (Note3 1~8 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM ( ( (OE ( (A- (W) ...
Page 7
... M5M5408BFP/TP/RT/KV/KR Write cycle (S control mode (Note3) DQ 1~8 Note 3: Hatching indicates the state is "don't care". Note 4: A Write occurs during the overlap of a low S and a low W. Note goes low simultaneously with or prior to S,the output remains in the high impedance state. Note 6: Don't apply inverted phase signal externally when DQ pin is in output mode. ...
Page 8
... M5M5408BFP/TP/RT/KV/KR POWER DOWN CHARACTERISTICS (1) ELECTRICAL CHARACTERISTICS Symbol Parameter Vcc Power down supply voltage (PD) Chip select input (S) Power down Icc (PD) supply current (2) TIMING REQUIREMINTS Symbol Parameter t Power down set up time su (PD) Power down recovery time t rec (PD) (3) TIMING DIAGRAM ...
Page 9
... M5M5408BFP/TP/RT/KV/KR Revision History Revision No. History K0.1e The first edition 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM Date '98.7.30 MITSUBISHI ELECTRIC MITSUBISHI LSIs PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change Preliminary 9 ...