TC55NEM208AFTN70 TOSHIBA Semiconductor CORPORATION, TC55NEM208AFTN70 Datasheet
TC55NEM208AFTN70
Related parts for TC55NEM208AFTN70
TC55NEM208AFTN70 Summary of contents
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TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 524,288-WORD BY 8-BIT STATIC RAM DESCRIPTION The TC55NEM208AFPN/AFTN is a 4,194,304-bit static random access memory (SRAM) organized as 524,288 words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, ...
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BLOCK DIAGRAM A11 A14 A15 A16 A18 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 OE R/W CE OPERATING MODE MODE Read Write Output Deselect Standby * = don't care H = logic high ...
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DC RECOMMENDED OPERATING CONDITIONS SYMBOL V Power Supply Voltage DD V Input High Voltage IH V Input Low Voltage IL V Data Retention Supply Voltage 2.0 V when measured at a pulse width ...
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AC CHARACTERISTICS AND OPERATING CONDITIONS READ CYCLE SYMBOL t Read Cycle Time RC t Address Access Time ACC t Chip Enable Access Time CO t Output Enable Access Time OE t Chip Enable Low to Output Active COE t Output ...
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TIMING DIAGRAMS (See Note 1) READ CYCLE Address A0~A18 OUT Hi-Z I/O1~8 WRITE CYCLE 1 (R/W CONTROLLED) Address A0~A18 R OUT I/O1 I/O1~8 TC55NEM208AFPN/AFTN55, ACC ...
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WRITE CYCLE CONTROLLED) Address A0~A18 R OUT Hi-Z I/O1 I/O1~8 Note: (1) R/W remains HIGH for the read cycle. ( goes LOW coincident with or after R/W goes LOW, the outputs ...
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DATA RETENTION CHARACTERISTICS SYMBOL V Data Retention Supply Voltage DH I Standby Current DDS2 t Chip Deselect to Data Retention Mode Time CDR t Recovery Time R CE CONTROLLED DATA RETENTION MODE GND ...
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PACKAGE DIMENSIONS Weight: g (typ) TC55NEM208AFPN/AFTN55,70 2002-09-18 8/10 ...
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PACKAGE DIMENSIONS Weight: g (typ) TC55NEM208AFPN/AFTN55,70 2002-09-18 9/10 ...
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RESTRICTIONS ON PRODUCT USE TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress the ...