ISL59832IRZ Intersil, ISL59832IRZ Datasheet - Page 13

• Manufacturer Part Number: ISL59832IRZ
• Description: IC VIDEO FILTER CHRG PUMP 16TQFN
• Manufacturer: Intersil

Specifications of ISL59832IRZ

• Applications: Filter
• Number Of Circuits: 2
• -3db Bandwidth: 9MHz
• Current - Supply: 14mA
• Voltage - Supply, Single/dual (±): 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Package: 16QFN EP
• Driver Type: SDTV
• Number Of Segments: 2
• Maximum Output Current: 50 mA
• Maximum Operating Supply Voltage: 3.6 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISL59832IRZTR; ISL59832IRZTR

Power Dissipation
With the high output drive capability of the ISL59832, it is
possible to exceed the +150°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to Equation 1:
PD
Where:
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
for sourcing:
for sinking:
Where:
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
PD
PD
T
T
Θ
V
I
V
R
I
i = Number of output channels
SMAX
LOAD
MAX
AMAX
MAX
MAX
JMAX
S
OUT
JA
LOAD
= Supply voltage
= Thermal resistance of the package
=
= Maximum output voltage of the application
= Load current
=
=
= Maximum quiescent supply current
= Maximum junction temperature
= Maximum ambient temperature
= Load resistance tied to ground
T
-------------------------------------------- -
V
V
JMAX
S
S
×
×
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
I
I
Θ
SMAX
SMAX
–
JA
T
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
AMAX
+
+
For information regarding Intersil Corporation and its products, see www.intersil.com
(
(
V
V
S
OUT
–
13
V
i V
OUT
–
S
i
)
)
×
×
I
V
-----------------
LOAD
OUT
R
L
i
i
i
(EQ. 1)
(EQ. 2)
(EQ. 3)
ISL59832
By setting Equation 1 equal to Equation 2 and 3, we can
solve for the output current and R
avoid exceeding the maximum junction temperature.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Strip
line design techniques are recommended for the input and
output signal traces to help control the characteristic
impedance. Furthermore, the characteristic impedance of
the traces should be 75Ω. Trace lengths should be as short
as possible between the output pin and the series 75Ω
resistor. The power supply pin must be well bypassed to
reduce the risk of oscillation. For normal single supply
operation, a single 4.7µF tantalum capacitor in parallel with a
0.1µF ceramic capacitor from V
suffice.
The AC performance of this circuit depends greatly on the
care taken in designing the PC board. The following are
recommendations to achieve optimum high frequency
performance from your PC board.
• Use low inductance components, such as chip resistors
• Minimize signal trace lengths. Trace inductance and
• Match channel-to-channel analog I/O trace lengths and
• Route all signal I/O lines over continuous ground planes
• Place termination resistors in their optimum location as
• Use good quality connectors and cables, matching cable
• Place flying and output capacitor as close to the device as
• Decouple well, using a minimum of 2 power supply
and chip capacitors whenever possible.
capacitance can easily limit circuit performance. Avoid
sharp corners; use rounded corners when possible. Vias
in the signal lines add inductance at high frequency and
should be avoided. PCB traces longer than 1" begin to
exhibit transmission line characteristics with signal rise/fall
times of 1ns or less. To maintain frequency performance
with longer traces, use striplines.
layout symmetry. This will minimize propagation delay
mismatches.
(i.e. no split planes or PCB gaps under these lines).
close to the device as possible.
types and keeping cable lengths to a minimum when
testing.
possible for the charge pump.
decoupling capacitors, placed as close to the device as
possible. Avoid vias between the capacitor and the device
because vias adds unwanted inductance. Larger caps may
be farther away. When vias are required in a layout, they
should be routed as far away from the device as possible.
S
and V
LOAD
values needed to
CP
to GND will
June 11, 2008
FN6267.1