EN29F800T-70T EON, EN29F800T-70T Datasheet
EN29F800T-70T
Related parts for EN29F800T-70T
EN29F800T-70T Summary of contents
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EN29F800 8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory Boot Sector Flash Memory, CMOS 5.0 Volt-only FEATURES 5.0V 10%, single power supply operation - Minimizes system level power requirements Manufactured on 0.32 µm process technology High performance ...
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CONNECTION DIAGRAMS A15 1 A14 2 A13 3 A12 4 A11 5 A10 WE# 11 RESET RY/BY A17 ...
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TABLE 2A. TOP BOOT BLOCK SECTOR ARCHITECTURE ADDRESS RANGE Sect or (X16) 18 7E000h-7FFFFh FC000h-FFFFFh 17 7D000h-7DFFFh FA000h-FBFFFh 16 7C000h-7CFFFh F8000h-F9FFFh 15 78000h-7BFFFh F0000h – F7FFFh 14 70000h-77FFFh E0000h - EFFFFh 13 68000h-6FFFFh D0000h - DFFFFh 12 60000h-6FFFFh C0000h - ...
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TABLE 2B. BOTTOM BOOT BLOCK SECTOR ARCHITECTURE ADDRESS RANGE Sect or (X16) 18 78000h-7FFFFh F0000h – FFFFFh 17 70000h-77FFFh E0000h – EFFFFh 16 68000h-6FFFFh D0000h – DFFFFh 15 60000h-67FFFh C0000h – CFFFFh 14 58000h-5FFFFh B0000h - BFFFFh 13 50000h-57FFFh A0000h ...
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PRODUCT SELECTOR GUIDE Product Number Speed Option Vcc=5.0V 10% Max Access Time acc Max CE# Access Max OE# Access BLOCK DIAGRAM RY/BY Vcc Vss State Control WE Program Voltage ...
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... Temporary Sector Unprotect X X Notes: L=logic low H=Logic High =11 TABLE 4. DEVICE IDENTIFICTION 8M FLASH MANUFACTURER/DEVICE ID TABLE Description Mode Manufacturer ID EON Device ID Word L L (top boot Byte L L block) Device ID Word L L (bottom boot Byte L L block) Sector Protection L L ...
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USER MODE DEFINITIONS Word / Byte Configuration The signal set on the BYTE# Pin controls whether the device data I/O pins DQ15-DQ0 operate in the byte or word configuration. When the Byte# Pin is set at logic ‘1’, then the ...
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... A9 and the control pins. Details on this method are provided supplement, which can be obtained by contacting a representative of Eon Silicon Devices, Inc. Temporary Sector Unprotect This feature allows temporary unprotection of previously protected sector groups to change data while in-system. The Sector Unprotect ...
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Hardware Data protection The command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes as seen in the Command Definitions table. Additionally, the following hardware data protection measures prevent accidental erasure or programming, which ...
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COMMAND DEFINITIONS The operations of the EN29F800 are selected by one or more commands written into the command register to perform Read/Reset Memory, Read ID, Read Sector Protection, Program, Sector Erase, Chip Erase, Erase Suspend and Erase Resume. Commands are ...
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Reset Command Writing the reset command to the device resets the device to reading array data. Address bits are don’t- care for this command. The reset command may be written between the sequence cycles in an erase command sequence before ...
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Any commands written to the chip during the Embedded Chip Erase algorithm are ignored. The system can determine the status of the erase operation by using DQ7, DQ6, or DQ2. See “Write Operation Status” for information on these status bits. ...
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WRITE OPERATION STATUS DQ7 DATA Polling The EN29F800 provides DATA Polling on DQ7 to indicate to the host system the status of the embedded operations. The DATA Polling feature is active during the Byte Programming, Sector Erase, Chip Erase, Erase ...
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During Byte Programming, the Toggle Bit is valid after the rising edge of the fourth WE pulse in the four-cycle sequence. For Chip Erase, the Toggle Bit is valid after the rising edge of ...
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Typically, a system would note and store the value of the toggle bit after the first read. After the second read, the system would compare the new value of the toggle bit with the first. If the toggle bit is ...
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Table 6. Status Register Bits DQ Name DATA 7 POLLING ‘-1-0-1-0-1-0-1-’ TOGGLE 6 BIT ‘-1-1-1-1-1-1-1-‘ 5 ERROR BIT ERASE 3 TIME BIT TOGGLE 2 ‘-1-0-1-0-1-0-1-’ BIT Notes: DATA DQ7 Polling: indicates the P/E C status check during Program or Erase, ...
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EMBEDDED ALGORITHMS Flowchart 1. Embedded Program Command Sequence Increment No Address Programming Done Flowchart 2. Embedded Program Command Sequence See the Command Definitions section for more information. 555H / AAH 2AAH / 55H 555H / A0H PROGRAM ADDRESS / PROGRAM ...
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Flowchart 3. Embedded Erase START Write Erase Command Sequence Data Poll from System or Toggle Bit successfully completed Data =FFh? No Erase Done 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Yes 18 Rev. E, Issue Date: 2001/07/05 ...
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Flowchart 4. Embedded Erase Command Sequence See the Command Definitions section for more information. Chip Erase 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H 555H/10H 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Sector Erase 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H Sector ...
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Flowchart 5. DATA Polling Algorithm Flowchart 6. Toggle Bit Algorithm 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Start Read Data DQ7 = Data? No DQ5 = 1? Read Data DQ7 = Data? Read Data DQ6 = Toggle? ...
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Table 7. DC Characteristics (T = 0°C to 70° 40°C to 85° 5.0V ± 10 Symbol Parameter Input Leakage Current I LI Output Leakage Current I LO Supply Current (read) TTL (read) CMOS Byte ...
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Test Conditions Device Under Test C L Note: Diodes are IN3064 or equivalent Test Specifications Test Conditions Output Load Output Load Capacitance Input Rise and Fall times Input Pulse Levels Input timing measurement reference levels Output timing measurement ...
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AC CHARACTERISTICS Hardware Reset (Reset#) Parameter Description Std Reset# Pin Low to Read or Write t READY Embedded Algorithms Reset# Pin Low to Read or Write t READY Non Embedded Algorithms t Reset# Pulse Width RP t Reset# High Time ...
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AC CHARACTERISTICS Word / Byte Configuration (Byte#) Std Parameter Description t /t CE# to Byte# switching Low or High ELFL ELFH t Byte# switching Low to Output HIGH Z FLQZ t Byte# switching High to Output Active FHQV CE OE ...
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Table 8. AC CHARACTERISTICS Read-only Operations Characteristics Parameter Symbols Description JEDEC Standard t t Read Cycle Time AVAV Address to Output Delay AVQV ACC t t Chip Enable To Output Delay ELQV Output Enable ...
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Table 9. AC CHARACTERISTICS Write (Erase/Program) Operations Parameter Symbols JEDEC Standard Description t t Write Cycle Time AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH DS ...
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Table 10. AC CHARACTERISTICS Write (Erase/Program) Operations CE Alternate Controlled Writes Parameter Symbols JEDEC Standard Description t t Write Cycle Time AVAV Address Setup Time AVEL Address Hold Time ELAX Data ...
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Table 11. ERASE AND PROGRAMMING PERFORMANCE Parameter Typ Sector Erase Time 1 Chip Erase Time 19 Byte Programming Time 7 Word Programming Time 7 Byte 8.2 Chip Programming Time Word 4.1 Erase/Program Endurance 100K Table 12. LATCH UP CHARACTERISTICS Parameter ...
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SWITCHING WAVEFORMS Figure 6. AC Waveforms for Chip/Sector Erase Operations Timings Erase Command Sequence (last 2 cycles Addresses 0x2AA CE# t GHWL OE WE WPH Data 0x55 t DS RY/BY# V ...
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Figure 7. Program Operation Timings Program Command Sequence (last 2 cycles Addresses 0x555 CE# t GHWL OE WE# t WPH t CS Data OxA0 RY/BY# t VCS V CC Notes: 1. PA=Program ...
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Figure 8. AC Waveforms for /DATA Polling During Embedded Algorithm Operations t RC Addresses VA t ACC CE OE# t OEH WE# DQ[7] DQ[6:0] t BUSY RY/BY# Notes: 1. VA=Valid Address for reading Data# ...
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AC CHARACTERISTICS Enter Embedded Erase WE# Erase DQ6 DQ2 DQ2 vs. DQ6 Temporary Sector Unprotect Parameter Description Std t V Rise and Fall Time VIDR ID RESET# Setup Time for Temporary t RSP Sector Unprotect Temporary Sector Unprotect Timing Diagram ...
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Figure 10. Alternate CE# Controlled Write Operation Timings PA for Program 0x555 for Program SA for Sector Erase 0x2AA for Erase 0x555 for Chip Erase Addresses WE GHEL OE CPH ...
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FIGURE 4. TSOP 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 34 Rev. E, Issue Date: 2001/07/05 EN29F800 Tel: 408-235-8680 Fax: 408-235-8685 ...
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Great America Parkway, Suite 202 Santa Clara, CA 95054 35 Rev. E, Issue Date: 2001/07/05 EN29F800 Tel: 408-235-8680 Fax: 408-235-8685 ...
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ABSOLUTE MAXIMUM RATINGS Parameter Storage Temperature Plastic Packages Ambient Temperature With Power Applied Output Short Circuit Current A9, OE#, Reset# Voltage with All other pins Respect to Ground Notes more than one output shorted at a time. Duration ...
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... S = Small Outline Package SPEED 45 = 45ns 55 = 55ns 70 = 70ns 90 = 90ns BOOT CODE SECTOR ARCHITECTURE T = Top Sector B = Bottom Sector BASE PART NUMBER EN = EON Silicon Devices 29F = FLASH, 5V Read Program Erase 800 = 8 Megabit (1024K 512 x 16) 37 Rev. E, Issue Date: 2001/07/05 EN29F800 Tel: 408-235-8680 Fax: 408-235-8685 ...
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Revisions List A,B,C: Preliminary D (2001.07.03): Table 7. Icc2 is with BYTE# and RESET# pin at full CMOS levels Pg. 9 Logical Inhibit section now says that (not recommended usage), it will be considered a write. VID is everywhere changed ...