AT32UC3A0512AU Atmel Corporation, AT32UC3A0512AU Datasheet - Page 76
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AT32UC3A0512AU
Manufacturer Part Number
AT32UC3A0512AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
6.AT32UC3A0128AU.pdf
(2 pages)
Specifications of AT32UC3A0512AU
Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
8.6
8.7
32002F–03/2010
MAC instructions
MulMac64 instructions
These instructions require one pass through the multiplier array and produce a 32- or 48-bit
result. This result is added to an accumulator register. A valid copy of this accumulator may be
cached in the accumulator cache. Otherwise, an extra cycle is needed to read the accumulator
from the register file. Therefore, issue and result latencies depend on whether the accumulator
is cached in the AccCache.
This group does not set any flags, except for the macsathh.w instruction which set Q if saturation
occurred.
Table 8-3.
These instructions require two passes through the multiplier array to produce a 64-bit result. For
macs.d and macu.d, a valid copy of this accumulator may be cached in the accumulator cache.
Otherwise, an extra cycle is needed to read the accumulator from the register file. Therefore,
issue and result latencies depend on whether a valid entry is found in the accumulator cache.
Table 8-4.
Mnemonics
mac
machh.w
machh.d
macwh.d
macsathh.w
Mnemonics
macs.d
macu.d
muls.d
mulu.d
MAC instructions
MulMac64 instructions
E
E
E
E
E
E
E
E
E
Operands
Rd, Rx, Ry
Rd, Rx<part>,
Ry<part>
Rd, Rx<part>,
Ry<part>
Rd, Rx, Ry<part>
Rd, Rx<part>,
Ry<part>
Operands
Rd, Rx, Ry
Rd, Rx, Ry
Rd, Rx, Ry
Rd, Rx, Ry
Description
Multiply accumulate.
(32 ← 32x32 + 32)
Multiply signed halfwords and accumulate.
(32 ← 16x16 + 32)
Multiply signed halfwords and accumulate.
(48 ← 16x16 + 48)
Multiply signed word and halfword and
accumulate.
(48 ← 32 x 16 + 48)
Fractional signed multiply accumulate with
saturation. Return word.
(32 ← 16 x 16 + 32)
Description
Multiply signed accumulate.
(64 ← 32x32 + 64)
Multiply unsigned accumulate.
(64 ← 32x32 + 64)
Signed Multiply.
(64 ← 32 x 32)
Unsigned Multiply.
(64 ← 32 x 32)
AVR32
Issue
latency
1/2
1/2
1/2
1/2
1/2
Issue
latency
3/4
3/4
2
2
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