AT32UC3A1512AU Atmel Corporation, AT32UC3A1512AU Datasheet - Page 528
AT32UC3A1512AU
Manufacturer Part Number
AT32UC3A1512AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
6.AT32UC3A0128AU.pdf
(2 pages)
Specifications of AT32UC3A1512AU
Flash (kbytes)
512 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
69
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A0128 PDF datasheet #4
- AT32UC3A0128 PDF datasheet #5
- AT32UC3A0128AU PDF datasheet #6
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32058K AVR32-01/12
30.7.3.13
30.7.3.13.1 Global Interrupts
30.7.3.13.2 Pipe Interrupts
30.7.3.13.3 DMA Interrupts
Interrupts
See the structure of the USB host interrupt system on
There are two kinds of host interrupts: processing, i.e. their generation is part of the normal pro-
cessing, and exception, i.e. errors (not related to CPU exceptions).
The processing host global interrupts are:
There is no exception host global interrupt.
The processing host pipe interrupts are:
The exception host pipe interrupts are:
The processing host DMA interrupts are:
There is no exception host DMA interrupt.
•the Device Connection interrupt (DCONNI);
•the Device Disconnection interrupt (DDISCI);
•the USB Reset Sent interrupt (RSTI);
•the Downstream Resume Sent interrupt (RSMEDI);
•the Upstream Resume Received interrupt (RXRSMI);
•the Host Start of Frame interrupt (HSOFI);
•the Host Wake-Up interrupt (HWUPI);
•the Pipe X interrupt (PXINT);
•the DMA Channel X interrupt (DMAXINT).
•the Received IN Data interrupt (RXINI);
•the Transmitted OUT Data interrupt (TXOUTI);
•the Transmitted SETUP interrupt (TXSTPI);
•the Short Packet interrupt (SHORTPACKETI);
•the Number of Busy Banks interrupt (NBUSYBK).
•the Underflow interrupt (UNDERFI);
•the Pipe Error interrupt (PERRI);
•the NAKed interrupt (NAKEDI);
•the Overflow interrupt (OVERFI);
•the Received STALLed interrupt (RXSTALLDI);
•the CRC Error interrupt (CRCERRI).
•the End of USB Transfer Status interrupt (EOT_STA);
•the End of Channel Buffer Status interrupt (EOCH_BUFF_STA);
•the Descriptor Loaded Status interrupt (DESC_LD_STA).
Figure 30-6 on page
AT32UC3A
504.
528
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