AT32UC3A1512AU Atmel Corporation, AT32UC3A1512AU Datasheet - Page 101
AT32UC3A1512AU
Manufacturer Part Number
AT32UC3A1512AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
6.AT32UC3A0128AU.pdf
(2 pages)
Specifications of AT32UC3A1512AU
Flash (kbytes)
512 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
69
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
9.2.14.3
32002F–03/2010
Debug Communication CPU Register (DCCPU)
features on this device. This information is static, and may be used to develop generic Nexus
debuggers which will work across a family of AVR32 devices with different Nexus configurations.
Table 9-6.
If the CPU wants to transmit data to the debugger tool, it writes data to the Debug Communica-
tion CPU Register using mtdr. By writing this register, a dirty bit is set in the Debug
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit Number
31:29
28
27:25
24
23
22
21
20:17
16
15:12
11:8
7:4
3:0
Nexus Configuration Register
Field Name
Reserved
NXDMA
NXDTC
NXDRT
NXDWT
NXOT
NXPT
NXMDO
NXMSEO
NXDB
NXPCB
NXOCD
NXARCH
Init. Val.
0
0
0
0
0
0
0
6
1
2
6
0
0
Description
Direct Memory Access support
0 = Not supported
1 = Supported
Data Trace Channels
0 = Not supported
1 = Supported
Data Read Trace Support
0 = Not supported
1 = Supported
Data Write Trace Support
0 = Not supported
1 = Supported
Ownership Trace support
0 = Not supported
1 = Supported
Program Trace support
0 = Not supported
1 = Supported
AUX MDO pins
0 = no MDO or MSEO pins
n = n MDO pins, NXMSEO MSEO pins
AUX MSEO pins
0 = 1 MSEO pin
1 = 2 MSEO pins
Number of Data breakpoints
Number of PC breakpoints
OCD Version
0000 = AVR32AP OCD
0001 = AVR32UC OCD
Other = Reserved
Architecture
0000 = AVR32B
0001 = AVR32A
Other = reserved
AVR32
101