AT32UC3A3256S Atmel Corporation, AT32UC3A3256S Datasheet - Page 74

• Manufacturer Part Number: AT32UC3A3256S
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3256S

• Flash (kbytes): 256 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: AES
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32002F–03/2010
Table 8-1.
orh
orl
tst
bfins
bfexts
bfextu
bld
brev
bst
casts.b
casts.h
castu.b
castu.h
cbr
clz
sbr
swap.b
swap.bh
swap.h
asr
lsl
lsr
rol
ror
mov
mov{cond4}
ALU instructions
E
E
C
E
E
E
E
C
E
C
C
C
C
C
E
C
C
C
C
E
E
C
E
E
C
E
E
C
C
C
C
E
C
E
E
Rd, imm
Rd, imm
Rd, Rs
Rd, Rs, o5, w5
Rd, Rs, o5, w5
Rd, Rs, o5, w5
Rd, b5
Rd
Rd, b5
Rd
Rd
Rd
Rd
Rd, b5
Rd, Rs
Rd, b5
Rd
Rd
Rd
Rd, Rx, Ry
Rd, Rs, sa
Rd, sa
Rd, Rx, Ry
Rd, Rs, sa
Rd, sa
Rd, Rx, Ry
Rd, Rs, sa
Rd, sa
Rd
Rd
Rd, imm
Rd, imm
Rd, Rs
Rd, Rs
Rd, imm
Logical OR (High Halfword).
Test register for zero.
Insert the lower w5 bits of Rs in Rd at bit-offset
o5.
Extract and sign-extend the w5 bits in Rs
starting at bit-offset o5 to Rd.
Extract and zero-extend the w5 bits in Rs
starting at bit-offset o5 to Rd.
Bit reverse.
Typecast byte to signed word.
Typecast halfword to signed word.
Typecast byte to unsigned word.
Typecast halfword to unsigned word.
Count leading zeros.
Swap bytes in register.
Arithmetic shift right (signed).
Logical shift left.
Logical shift right.
Rotate left through carry.
Load immediate into register.
Copy register.
Copy register if condition is true
Load immediate into register if condition is true
Logical OR (Low Halfword).
Bit load.
Bit store.
Clear bit in register.
Set bit in register.
Swap bytes in each halfword.
Swap halfwords in register.
Rotate right through carry.
AVR32
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
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