AT32UC3A4128 Atmel Corporation, AT32UC3A4128 Datasheet - Page 8
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AT32UC3A4128
Manufacturer Part Number
AT32UC3A4128
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A4128
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Company
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Manufacturer
Quantity
Price
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Manufacturer:
STM
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Company:
Part Number:
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6.2.2 Flash User Page
6.3 Boot Process
8
Flash and ISP specification
The bootloader uses the flash User page to store the I/O conditions that determine which of the
USB DFU ISP and the application to start at the end of the boot process.
Table 6-4. Bootloader Flash User Page Configuration Word
The default value of the bootloader flash User page configuration word is:
•
•
•
i.e. the ISP will be activated when
•
•
Refer to section 7.3 “Customizing the ISP Configuration Word” to compute a value of the boot-
loader configuration word from a given set of ISP_IO_COND_PIN and ISP_IO_COND_LEVEL
values.
After reset, the boot process starts at 80000000h:
•
•
•
Last 32
Bits of the
Flash User
Page
7:0
15:8
16
31:17
929E1424h for AVR UC3 A0, A1,
0x929E2A9E for AVR UC3 A3
929E0D6Bh for AVR UC3 B0, B1,
the joystick is pressed on EVK1100 or EVK1101 at reset,
the SW2 button is pressed on EVK1104 at reset.
BOD is enabled with reset if the ISP_BOD_EN GP fuse bit is 1.
If the ISP_FORCE GP fuse bit is 1, the USB DFU ISP is immediately started.
If the ISP_FORCE GP fuse bit is 0:
Name
ISP_CRC8
ISP_IO_COND_PIN
ISP_IO_COND_LEVEL
ISP_BOOT_KEY
Description
CRC8 on the bootloader User page configuration
word with polynomial:
P(X) = X
This CRC is used to check the validity of this
configuration word.
The GPIO pin number to test during the boot
process to know which of the USB DFU ISP and the
application to start. E.g., to select PX16 (i.e. QFP144
pin 61 and the GPIO pin 88) on AT32UC3A0512,
this bit-field has to be set to 88.
Possible values are:
- 0 to 109 for AVR UC3 A0 QFP144;
- 0 to 69 for AVR UC3 A1 QFP100;
- 0 to 109 for AVR UC3 A3 QFP144 or BGA144
- 0 to 43 for AVR UC3 B0 QFP64;
- 0 to 27 for AVR UC3 B1 QFP48.
Active level of ISP_IO_COND_PIN that the
bootloader will consider as a request for starting the
USB DFU ISP: 0 for GPIO low level, 1 for GPIO high
level.
Boot key = 494Fh. This key is used to identify the
word as meaningful for the bootloader.
8
+X
2
+X+1.
7745C–AVR32–05/09