AT32UC3A4256 Atmel Corporation, AT32UC3A4256 Datasheet - Page 145
AT32UC3A4256
Manufacturer Part Number
AT32UC3A4256
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A4256
Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3A4256S-C1UR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
AT32UC3A4256S-U
Manufacturer:
ST
Quantity:
79
Part Number:
AT32UC3A4256S-U
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 145 of 377
- Download datasheet (5Mb)
If the on chip debug system is enabled, this instruction traps a software breakpoint for debugging. The breakpoint instruc-
tion will enter debug mode disabling all interrupts and exceptions. If the on chip debug system is not enabled, this
instruction will execute as a nop.
If no on chip debug system is implemented, this instruction will execute as a "NOP".
32000D–04/2011
BREAKPOINT – Software Debug Breakpoint
Architecture revision:
Architecture revision1 and higher.
Description
Operation:
I.
Syntax:
I.
Operands:
Status Flags:
Opcode:
Note:
15
1
if (SR[DM]==0)
else
breakpoint
None
Q:
V:
N:
Z:
C:
1
0
RSR_DBG ← SR;
RAR_DBG ← address of first non-completed instruction;
SR[R] ← 1;
SR[J] ← 1;
SR[D] ← 1;
SR[M2:M0] ← B’110;
SR[DM] ← 1;
SR[EM] ← 1;
SR[GM] ← 1;
PC ← EVBA+0x1C;
PC ← PC + 2;
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
1
0
1
9
1
8
0
0
1
1
4
1
3
0
0
AVR32
1
0
1
145
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