AT32UC3B0512 Atmel Corporation, AT32UC3B0512 Datasheet - Page 283

• Manufacturer Part Number: AT32UC3B0512
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B0512

• Flash (kbytes): 512 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 44
• Ext Interrupts: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 4
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

• CKG: Transmit Clock Gating Selection
• CKI: Transmit Clock Inversion
• CKO: Transmit Clock Output Mode Selection
• CKS: Transmit Clock Selection
32059L–AVR32–01/2012
Others
CKG
CKO
CKS
CKI affects only the Transmit Clock and not the output clock signal.
1: The data outputs (Data and Frame Sync signals) are shifted out on transmit clock rising edge. The Frame sync signal input is
sampled on transmit clock falling edge.
0: The data outputs (Data and Frame Sync signals) are shifted out on transmit clock falling edge. The Frame sync signal input is
sampled on transmit clock rising edge.
0
1
2
3
0
1
2
3
0
1
2
None, continuous clock
Transmit Clock enabled only if TX_FRAME_SYNC is low
Transmit Clock enabled only if TX_FRAME_SYNC is high
Reserved
Selected Transmit Clock
Divided Clock
RX_CLOCK clock signal
TX_CLOCK Pin
Reserved
Transmit Clock Gating
Transmit Clock Output Mode
None
Continuous transmit clock
Transmit clock only during data transfers
Reserved
TX_CLOCK pin
Input-only
Output
Output
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