AT32UC3B1256 Atmel Corporation, AT32UC3B1256 Datasheet - Page 282
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AT32UC3B1256
Manufacturer Part Number
AT32UC3B1256
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3B0128.pdf
(684 pages)
5.AT32UC3B0128.pdf
(107 pages)
Specifications of AT32UC3B1256
Flash (kbytes)
256 Kbytes
Pin Count
48
Max. Operating Frequency
60 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
28
Ext Interrupts
28
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3B1256-AUR
Manufacturer:
OMRON
Quantity:
12 000
Company:
Part Number:
AT32UC3B1256-AUT
Manufacturer:
ATMEL
Quantity:
1 000
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3B0128 PDF datasheet #4
- AT32UC3B0128 PDF datasheet #5
- Current page: 282 of 377
- Download datasheet (5Mb)
282
AVR32
POPM – Pop Multiple Registers from Stack
Architecture revision:
Architecture revision1 and higher.
Description
Loads the consecutive words pointed to by SP into the registers specified in the instruction. The
PC can be loaded, resulting in a jump to the loaded value. If PC is popped, the return value in
R12 is tested and the flags are updated. R12 can optionally be updated with -1, 0 or 1. The k bit
in the instruction coding is used to optionally let the POPM instruction update the return register
R12 with the values -1, 0 or 1.
Operation:
I.
if Reglist8[PC] ∧ k == B’1
else
if Reglist8[5] == 1 then
if Reglist8[4] == 1 then
if Reglist8[3] == 1 then
if Reglist8[2] == 1 then
if Reglist8[1] == 1 then
PC ← *(SP++)
if Reglist8[LR:R12] == B’00
else if Reglist8[LR:R12] == B’01
else
Test R12 and update flags;
if Reglist8[PC] == 1 then
if Reglist8[LR] == 1 then
if Reglist8[R12] == 1 then
if Reglist8[PC] == 1 then
R11 ←*(SP++);
R10 ←*(SP++);
R9 ← *(SP++);
R8 ← *(SP++);
R7 ← *(SP++);
R6 ← *(SP++);
R5 ← *(SP++);
R4 ← *(SP++);
R3 ← *(SP++);
R12 ← 0;
R12 ← 1;
R12 ← −1;
PC ← *(SP++);
LR ← *(SP++);
R12 ←*(SP++);
Test R12 and update flags;
32000D–04/2011
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