AT32UC3C0512C Atmel Corporation, AT32UC3C0512C Datasheet - Page 153
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AT32UC3C0512C
Manufacturer Part Number
AT32UC3C0512C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C0512C
Flash (kbytes)
512 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
9.11
32002F–03/2010
OCD Register Summary
Use the index shown in the "Register index" column when accessing OCD registers by the
Nexus access mechanism (see
"mtdr/mfdr index" column when accessing OCD registers by mtdr/mfdr instructions from the
CPU (see
plied by 4.
Table 9-64.
Register
Index
0
1
2
3
4
5-6
7
8
9
10
11
12
13
14–15
16-17
18–19
20-21
22
23
24
25
26
27
28
29
30
31
32
33
Section 9.2.10 on page
mtdr/mf
dr index
0
4
8
12
16
20-24
28
32
36
40
44
48
52
56-60
64-68
72-76
80-84
88
92
96
100
104
108
112
116
120
124
128
132
OCD Register Summary
Register
Device ID (DID)
Reserved
Development Control (DC)
Reserved
Development Status (DS)
Reserved
Reserved
Reserved
Reserved
Reserved
Watchpoint Trigger (WT)
Reserved
Data Trace Control (DTC)
Data Trace Start Address (DTSA) Channel 0 to 1
Reserved
Data Trace End Address (DTEA) Channel 0 to 1
Reserved
PC Breakpoint/Watchpoint Control 0A (BWC0A)
PC Breakpoint/Watchpoint Control 0B (BWC0B)
PC Breakpoint/Watchpoint Control 1A (BWC1A)
PC Breakpoint/Watchpoint Control 1B (BWC1B)
PC Breakpoint/Watchpoint Control 2A (BWC2A)
PC Breakpoint/Watchpoint Control 2B (BWC2B)
Data Breakpoint/Watchpoint Control 3A (BWC3A)
Data Breakpoint/Watchpoint Control 3B (BWC3B)
PC Breakpoint/Watchpoint Address 0A (BWA0A)
PC Breakpoint/Watchpoint Address 0B (BWA0B)
PC Breakpoint/Watchpoint Address 1A (BWA1A)
PC Breakpoint/Watchpoint Address 1B (BWA1B)
Section 9.3.2 on page
98). These indexes are identical to the register index multi-
109).Use the index shown in the
Access
Type
R
—
R/W
—
R
—
—
—
—
—
R/W
—
R/W
R/W
—
R/W
—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
AVR32
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