AT32UC3C064C Atmel Corporation, AT32UC3C064C Datasheet - Page 1275
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AT32UC3C064C
Manufacturer Part Number
AT32UC3C064C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C064C
Flash (kbytes)
64 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
123
Ext Interrupts
144
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
7
Twi (i2c)
3
Uart
5
Can
2
Lin
5
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
22
Input Capture Channels
12
Pwm Channels
20
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3C0128C PDF datasheet #3
- AT32UC3C0128C PDF datasheet #4
- Current page: 1275 of 1313
- Download datasheet (20Mb)
Table 40-49. SPI Timing, Slave Mode
Note:
40.9.5
32117C–AVR-08/11
Symbol
SPI6
SPI7
SPI8
SPI9
SPI10
SPI11
SPI12
SPI13
SPI14
SPI15
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
TWIM/TWIS Timing
cess technology. These values are not covered by test limits in production.
Parameter
SPCK falling to MISO delay
MOSI setup time before SPCK rises
MOSI hold time after SPCK rises
SPCK rising to MISO delay
MOSI setup time before SPCK falls
MOSI hold time after SPCK falls
NPCS setup time before SPCK rises
NPCS hold time after SPCK falls
NPCS setup time before SPCK falls
NPCS hold time after SPCK rises
Maximum SPI Frequency, Slave Input Mode
The maximum SPI slave input frequency is given by the following formula:
Where
CPOL and NCPHA.
ter for a description of this clock.
Maximum SPI Frequency, Slave Output Mode
The maximum SPI slave output frequency is given by the following formula:
Where
SPI master setup time. Please refer to the SPI masterdatasheet for
mum frequency of the SPI pins. Please refer to the I/O Pin Characteristics section for the
maximum frequency of the pins.
Figure 40-50
them. Some of these requirements (t
vention. Compliance with the other requirements (t
I2C
, t
HIGH
, and f
SPIn
SPIn
(1)
shows the TWI-bus timing requirements and the compliance of the device with
is the MISO delay, SPI6 or SPI9 depending on CPOL and NCPHA.
is the MOSI setup and hold time, SPI7 + SPI8 or SPI10 + SPI11 depending on
TWCK
) requires user intervention through appropriate programming of the relevant
f
CLKSPI
f
SPCKMAX
is the maximum frequency of the CLK_SPI. Refer to the SPI chap-
f
SPCKMAX
Conditions
capacitor =
r
=
external
and t
40pF
MIN f
=
f
) are met by the device without requiring user inter-
(
MIN f
PINMAX
(
HD-STA
CLKSPI
,
------------------------------------
SPIn
, t
,
SU-STA
Min
----------- -
SPIn
6.5
1.5
1.5
0
0
5
0
0
+
1
1
t
SETUP
)
, t
SU-STO
)
t
SETUP
, t
HD-DAT
AT32UC3C
.
Max
f
PINMAX
29
30
, t
SU-DAT-I2C
t
SETUP
is the maxi-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
, t
is the
1275
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