AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 76

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 7-48.
Note:
32117CS–AVR-08/11
Symbol
SPI0
SPI1
SPI2
SPI3
SPI4
SPI5
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
cess technology. These values are not covered by test limits in production.
SPI Timing, Master Mode
Parameter
MISO setup time before SPCK rises
MISO hold time after SPCK rises
SPCK rising to MOSI delay
MISO setup time before SPCK falls
MISO hold time after SPCK falls
SPCK falling to MOSI delay
Figure 7-12. SPI Master Mode With (CPOL= 0 and NCPHA= 1) or (CPOL= 1 and NCPHA= 0)
Maximum SPI Frequency, Master Output
The maximum SPI master output frequency is given by the following formula:
Where
maximum frequency of the SPI pins. Please refer to the I/O Pin Characteristics section for the
maximum frequency of the pins.
Maximum SPI Frequency, Master Input
The maximum SPI master input frequency is given by the following formula:
Where
CPOL and NCPHA.
datasheet for
SPIn
SPIn
SPCK
MISO
MOSI
(1)
is the MOSI delay, SPI2 or SPI5 depending on CPOL and NCPHA.
is the MISO setup and hold time, SPI0 + SPI1 or SPI3 + SPI4 depending on
t
VALID
.
t
VALID
SPI5
is the SPI slave response time. Please refer to the SPI slave
f
SPCKMAX
f
SPCKMAX
Conditions
capacitor =
external
40pF
=
MIN f
SPI3
=
----------------------------------- -
SPIn
(
PINMAX
28.5 + (t
28.5+ (t
+
1
t
VALID
,
Min
----------- -
SPIn
CLK_SPI
0
0
CLK_SPI
SPI4
1
)
)/2
)/2
AT32UC3C
Max
10.5
10.5
f
PINMAX
Units
ns
ns
ns
ns
ns
ns
is the
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