AT32UC3C2512C Atmel Corporation, AT32UC3C2512C Datasheet - Page 975
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AT32UC3C2512C
Manufacturer Part Number
AT32UC3C2512C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C2512C
Flash (kbytes)
512 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3C2512C-A2UR
Manufacturer:
YAGEO
Quantity:
60 000
Company:
Part Number:
AT32UC3C2512C-U
Manufacturer:
ATMEL
Quantity:
125
Company:
Part Number:
AT32UC3C2512C-Z2ZR
Manufacturer:
Atmel
Quantity:
1 499
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3C0128C PDF datasheet #3
- AT32UC3C0128C PDF datasheet #4
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33.6.2.5
32117C–AVR-08/11
Output Override
The two complementary outputs DTOHx and DTOLx of the dead-time generator can be forced
to a value defined by the software.
Figure 33-8. Override Output Selection
The OSHx and OSLx fields in the
puts of the dead-time generator DTOHx and DTOLx to be overridden by the value defined in the
OOVHx and OOVLx fields in
The set registers
Update Register” on page 1018
channel regardless of other channels. In the same way, the clear registers
Clear Register” on page 1017
(OSC and OSCUPD) disable the override of the outputs of a channel regardless of other
channels.
By using buffer OSSUPD and OSCUPD registers, the output selection of PWM outputs is done
synchronously to the channel counter, at the beginning of the next PWM period.
By using OSS and OSC registers, the output selection of PWM outputs is done asynchronously
to the channel counter, as soon as the register is written.
The value of the current output selection can be read in OS.
While overriding PWM outputs, the channel counters continue to run, only the PWM outputs are
forced to user defined values.
”Output Selection Set Register” on page 1016
the”Output Override Value Register” on page 1014
and
(OSS and OSSUPD) enable the override of the outputs of a
”Output Selection Register” on page 1015
”Output Selection Clear Update Register” on page 1019
DTOHx
OOVHx
DTOLx
OOVLx
OSHx
OSLx
0
1
0
1
OOOHx
OOOLx
and
”Output Selection Set
AT32UC3C
(OS) allow the out-
”Output Selection
(OOV).
975
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