AT83C5136 Atmel Corporation, AT83C5136 Datasheet - Page 49

• Manufacturer Part Number: AT83C5136
• Manufacturer: Atmel Corporation

Specifications of AT83C5136

• Max. Operating Frequency: 32 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Sram (kbytes): 1.25
• Eeprom (bytes): 512
• Operating Voltage (vcc): 2.7 to 3.6
• Timers: 4
• Mask Rom (kbytes): 32
• Watchdog: Yes

14. Serial I/O Port
14.1
7683C–USB–11/07
Framing Error Detection
The serial I/O port in the AT83C5134/35/36 is compatible with the serial I/O port in the 80C52.
It provides both synchronous and asynchronous communication modes. It operates as an Uni-
versal Asynchronous Receiver and Transmitter (UART) in three full-duplex modes (modes 1, 2
and 3). Asynchronous transmission and reception can occur simultaneously and at different
baud rates.
Serial I/O port includes the following enhancements:
Framing bit error detection is provided for the three asynchronous modes (modes 1, 2 and 3). To
enable the framing bit error detection feature, set SMOD0 bit in PCON register (see Figure 14-
1).
Figure 14-1. Framing Error Block Diagram
When this feature is enabled, the receiver checks each incoming data frame for a valid stop bit.
An invalid stop bit may result from noise on the serial lines or from simultaneous transmission by
two CPUs. If a valid stop bit is not found, the Framing Error bit (FE) in SCON register (See
14-1) bit is set.
Software may examine FE bit after each reception to check for data errors. Once set, only soft-
ware or a reset can clear FE bit. Subsequently received frames with valid stop bits cannot clear
FE bit. When FE feature is enabled, RI rises on stop bit instead of the last data bit (See
14-2
Figure 14-2. UART Timings in Mode 1
• Framing error detection
• Automatic address recognition
and
Figure
SMOD0 = X
SMOD0 = 1
RXD
14-3).
SM0/FE
FE
RI
SMOD1
SMOD0
SM1
Start
Bit
D0
SM2
-
D1
REN
Set FE Bit if Stop Bit is 0 (framing error) (SMOD0 = 1)
SM0 to UART Mode Control (SMOD0 = 0)
POF
To UART Framing Error Control
D2
TB8
GF1
D3
Data Byte
RB8
GF0
D4
D5
PD
TI
AT83C5134/35/36
D6
IDL
RI
D7
SCON (98h)
PCON (87h)
Stop
Bit
Figure
Table
49