AT89C51CC02 Atmel Corporation, AT89C51CC02 Datasheet - Page 30

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AT89C51CC02

Manufacturer Part Number
AT89C51CC02
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51CC02

Flash (kbytes)
16 Kbytes
Max. Operating Frequency
40 MHz
Cpu
8051-12C
Max I/o Pins
20
Uart
1
Can
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
0.5
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART/CAN
Watchdog
Yes

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30
AT/T89C51CC02
Table 19. AUXR1 Register
AUXR1 (S:A2h)
Auxiliary Control Register 1
Reset Value = XXXX 00X0b
Note:
Number
7 - 6
Bit
7
5
4
3
2
1
0
-
1. ENBOOT is initialized with the invert BLJB at reset. See In-System Programming
section.
Mnemonic
ENBOOT
DPS
GF3
Bit
6
0
-
-
-
-
(1)
Description
Reserved
The value read from these bits is indeterminate. Do not set these bits.
Enable Boot Flash
Set this bit to map the boot Flash between F800h -FFFFh
Clear this bit to disable boot Flash.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
General Purpose Flag 3
Always Zero
This bit is stuck to logic 0 to allow INC AUXR1 instruction without affecting GF3
flag.
Reserved for Data Pointer Extension
Data Pointer Select bit
Set to select second dual data pointer: DPTR1.
Clear to select first dual data pointer: DPTR0.
ENBOOT
5
4
-
GF3
3
2
0
1
-
4126L–CAN–01/08
DPS
0

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