AT89C51CC02 Atmel Corporation, AT89C51CC02 Datasheet - Page 50
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AT89C51CC02
Manufacturer Part Number
AT89C51CC02
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C51CC02.pdf
(7 pages)
2.AT89C51CC02.pdf
(159 pages)
3.AT89C51CC02.pdf
(33 pages)
4.AT89C51CC02.pdf
(29 pages)
Specifications of AT89C51CC02
Flash (kbytes)
16 Kbytes
Max. Operating Frequency
40 MHz
Cpu
8051-12C
Max I/o Pins
20
Uart
1
Can
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
0.5
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART/CAN
Watchdog
Yes
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Hardware Security Byte
50
AT/T89C51CC02
Table 32. Hardware Security byte
After erasing the chip in parallel mode, the default value is : FFh
The erasing in ISP mode (from bootloader) does not modify this byte.
Notes:
Number
X2B
5 - 3
2 - 0
Bit
7
7
6
1. Only the 4 MSB bits can be accessed by software.
2. The 4 LSB bits can only be accessed by parallel mode.
Mnemonic Description
BLJB
LB2:0
BLJB
X2B
Bit
6
-
X2 bit
Set this bit to start in standard mode
Clear this bit to start in X2 Mode.
Boot Loader Jump bit
- 1: To start the user’s application on next RESET (@0000h) located in FM0,
- 0: To start the boot loader(@F800h) located in FM1.
Reserved
The value read from these bits are indeterminate.
Lock bits (see Table 22)
5
-
4
-
3
-
LB2
2
LB1
1
4126L–CAN–01/08
LB0
0