AT89C51IC2 Atmel Corporation, AT89C51IC2 Datasheet - Page 22

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AT89C51IC2

Manufacturer Part Number
AT89C51IC2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51IC2

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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Figure 6. Mode Switching Waveforms
22
AT89C51IC2
XTALA1
XTALA1:2
X2 bit
CPU clock
STD Mode
The X2 bit in the CKCON0 register (see Table 19) allow to switch from 12 clock periods
per instruction to 6 clock periods and vice versa. At reset, the speed is setting according
to X2 bit of Hardware Security Byte (HSB). By default, Standard mode is actived. Setting
the X2 bit activates the X2 feature (X2 mode).
The T0X2, T1X2, T2X2, UartX2, PcaX2, WdX2 and I2CX2 bits in the CKCON0 register
(See Table 19.) and SPIX2 bit in the CKCON1 register (see Table 20) allow to switch
from standard peripheral speed (12 clock periods per peripheral clock cycle) to fast
peripheral speed (6 clock periods per peripheral clock cycle). These bits are active only
in X2 mode.
More information about the X2 mode can be found in the application note "How to take
advantage of the X2 features in TS80C51 microcontroller?"
F
OSCA
X2 Mode
STD Mode
4301D–8051–02/08

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