AT89LP51ID2 Atmel Corporation, AT89LP51ID2 Datasheet
AT89LP51ID2
Specifications of AT89LP51ID2
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AT89LP51ID2 Summary of contents
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... General-purpose Interrupt and Keyboard Interface Pins • Special Microcontroller Features – Dual Oscillator Support: Crystal, 32 kHz Crystal, 8 MHz Internal (AT89LP51ID2) – Two-wire On-Chip Debug Interface – Brown-out Detection and Power-on Reset with Power-off Flag – Selectable Polarity External Reset Pin – ...
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... P3.0 11 (SDA) P4.1 12 (TXD) P3.1 13 (INT0) P3.2 14 (INT1) P3.3 15 (T0) P3.4 16 (T1) P3.5 17 † SPI in remap mode ‡ AT89LP51ID2 Only AT89LP51RD2/ED2/ID2 Summary - Preliminary 2 1.3 44-pad VQFN/QFN/MLF † SPI in remap mode ‡ AT89LP51ID2 Only 33 P0.4 (AD4) (†MOSI/CEX2/MISO) P1.5 32 P0.5 (AD5) (†MISO/CEX3/SCK) P1.6 31 P0.6 (AD6) (†SCK/CEX4/MOSI) P1.7 30 P0.7 (AD7) (DCL) RST 29 POL (RXD) P3.0 28 P4.0 (SCL) (SDA) P4.1 27 P4.4 (ALE) (TXD) P3 ...
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AT89LP51RD2/ED2/ID2 Summary - Preliminary 1.5 Pin Description Table 1-1. Atmel AT89LP51RD2/ED2/ID2 Pin Description Pin Number (1) VQFP VQFN PLCC PDIP Symbol RST ...
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Table 1-1. Atmel AT89LP51RD2/ED2/ID2 Pin Description Pin Number (1) VQFP VQFN PLCC PDIP Symbol GND ...
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... The Atmel controller with 64KB of In-System Programmable Flash program memory. The AT89LP51ED2 and AT89LP51ID2 provide an additional 4KB of EEPROM for nonvolatile data storage. The devices are manufactured using Atmel's high-density nonvolatile memory technology and are compatible with the industry-standard 80C51 instruction set. ...
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... The on-chip Flash and EEPROM may also be programmed through the UART-based bootloader or the SPI-based In-System programming interface (ISP). The TWI and OCD features are not available on the PDIP package. The AT89LP51ID2 is also not available in PDIP. The features of the AT89LP51RD2/ED2/ID2 make it a powerful choice for applications that need pulse width modulation, high speed I/O, and counting capabilities such as alarms, motor control, corded phones, and smart card readers ...
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... Configurable I/O Port 2 Configurable I/O Port 3 Configurable I/O Port 4 Configurable I/O Dual Analog Comparators Configurable Oscillator A Configurable Oscillator B (AT89LP51ID2) lists the fusible options for the AT89LP51RD2/ED2/ID2. These options maintain their RAM ERAM 4KB 256 Bytes 2KB with 12-cycle Compatiblity UART Watchdog Timer Keyboard Interface Timer 0 ...
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... A is selected. Selects between the 32 kHzCrystal Oscillator, External Clock on XTAL1B or Internal RC Oscillator for the source of the system clock when oscillator B is selected (AT89LP51ID2 Only). Selects whether oscillator enabled to boot the device. (AT89LP51ID2 Only) Selects the default state of whether the clock source is divided by two (X1) or not (X2) to generate the system clock ...
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... RC oscillator for AT89LP51RD2/ED2 and clock source A of AT89LP51ID2. Clock source B of AT89LP51ID2 is not limited kHz crystal. The clock source B is selectable between the 32 kHz crystal oscillator, an externally driven clock and an internal 8.0MHz RC oscillator. Unlike AT89C51ID2, the X2 and CKRL features will also affect the OSCB source ...
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Timer/Counters A common prescaler is available to divide the time base for Timer 0, Timer 1, Timer 2 and the WDT. The TPS defaults to 0101B, which causes the timers to count once every machine cycle. The counting rate ...
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AT89LP51RD2/ED2/ID2 Summary - Preliminary 2.3.9 Security The AT89LP51RD2/ED2/ID2 does not support the external access pin (EA). Therefore it is not possible to execute from external program memory in address range 0000H–1FFFH. When the third Lockbit is enabled (Lock Mode 4) ...
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Special Function Registers A map of the on-chip memory area called the Special Function Register (SFR) space is shown in Table 3-1. Note that not all of the addresses are occupied, and unoccupied addresses may not be imple- mented ...
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... Clock Control Register 0 CKCKON1 AFh Clock Control Register 1 (1) CKSEL 85h Clock Selection Register CLKREG AEh Clock Register (1) OSCCON 85h Oscillator Control Register Note: 1. Present on AT89LP51ID2 Only 3714AS–MICRO–7/ RS1 – – – – – – – ...
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Table 3-5. Interrupt SFRs Mnemonic Add Name IEN0 A8h Interrupt Enable Control 0 IEN1 B1h Interrupt Enable Control 1 IPH0 B7h Interrupt Priority Control High 0 IPL0 B8h Interrupt Priority Control Low 0 IPH1 B3h Interrupt Priority Control High 1 ...
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AT89LP51RD2/ED2/ID2 Summary - Preliminary Table 3-8. Timer SFRs Mnemonic Add Name TCON 88h Timer/Counter 0 and 1 Control TMOD 89h Timer/Counter 0 and 1 Modes TCONB 91h Timer/Counter 0 and 1 Mode B TL0 8Ah Timer/Counter 0 Low Byte TH0 ...
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Table 3-11. Keyboard Interface SFRs Mnemonic Add Name KBLS 9Ch Keyboard Level Selector KBE 9Dh Keyboard Input Enable KBF 9Eh Keyboard Flag Register KBMOD 9Fh Keyboard Mode Register Table 3-12. Flash/EEPROM Memory SFR Mnemonic Add Name BMSEL 92h Bank Mode ...
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AT89LP51RD2/ED2/ID2 Summary - Preliminary Table 3-15. PCA SFRs (Continued) Mnemo -nic Add Name CCAPM3 DDh PCA Timer/Counter Mode 3 CCAPM4 DEh PCA Timer/Counter Mode 4 CCAP0H FAh PCA Compare Capture Module 0 H CCAP0H7 CCAP0H6 CCAP0H5 CCAP0H4 CCAP0H3 CCAP0H2 CCAP0H1 ...
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... AT89LP51ED2-20AAU AT89LP51ED2-20AAUR AT89LP51ED2-20AU AT89LP51ED2-20AUR Yes 1 AT89LP51ED2-20JU AT89LP51ED2-20JUR AT89LP51ED2-20MU AT89LP51ED2-20MUR AT89LP51ED2-20PU AT89LP51ID2-20AAU AT89LP51ID2-20AAUR AT89LP51ID2-20AU Yes 2 AT89LP51ID2-20AUR AT89LP51ID2-20JU AT89LP51ID2-20JUR AT89LP51ID2-20MU Package Types Package Packing Tray 44AA (LQFP) Reel Tray 44A (TQFP) Reel Stick 44J (PLCC) Reel Tray 44M1 (VQFN) Reel 40P6 (PDIP) Stick ...
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... AT89LP51RD2/ED2/ID2 Summary - Preliminary 4.2 Cross Reference with AT89C51RD2/ED2/ID2 Table 4-1. Ordering Cross Reference AT89C51RD2/ED2/ID2 to AT89LP51RD2/ED2/ID2 Device Migration AT89C51RD2 to AT89LP51RD2 AT89C51ED2 to AT89LP51ED2 AT89C51ID2 to AT89LP51ID2 Table 4-2. Packages Not Found in AT89C51RD2/ED2/ID2 Device AT89C51RD2 to AT89LP51RD2 AT89C51ED2 to AT89LP51ED2 AT89C51ID2 to AT89LP51ID2 3714AS–MICRO–7/11 Package Packing Previous Ordering Code ...
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Packaging Information 5.1 44AA – VQFP/LQFP PIN 1 PIN 1 IDENTIFIER e C 0°~8° L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is ...
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AT89LP51RD2/ED2/ID2 Summary - Preliminary 5.2 44A – TQFP PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm ...
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PLCC 1.14(0.045) X 45˚ 0.51(0.020)MAX 45˚ MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-018, Variation AC. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per ...
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AT89LP51RD2/ED2/ID2 Summary - Preliminary 5.4 44M1 – VQFN/MLF D Marked Pin TOP VIEW BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 1 (SAW Singulation) VKKD-3. Package Drawing Contact: packagedrawings@atmel.com 3714AS–MICRO–7/11 E Pin #1 ...
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PDIP A SEATING PLANE Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed ...
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AT89LP51RD2/ED2/ID2 Summary - Preliminary 6. Revision History Revision No. Revision A – July 2011 3714AS–MICRO–7/11 History • Initial Release 25 ...
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