AT89S52 Atmel Corporation, AT89S52 Datasheet - Page 4

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AT89S52

Manufacturer Part Number
AT89S52
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT89S52

Flash (kbytes)
8 Kbytes
Max. Operating Frequency
24 MHz
Cpu
8051-12C
Max I/o Pins
32
Uart
1
Sram (kbytes)
0.25
Operating Voltage (vcc)
4.0 to 5.5
Timers
3
Isp
SPI
Watchdog
Yes

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4. Pin Description
4.1
4.2
4.3
4.4
4.5
4
VCC
GND
Port 0
Port 1
Port 2
AT89S52
Supply voltage.
Ground.
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL
inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.
Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses
to external program and data memory. In this mode, P0 has internal pull-ups.
Port 0 also receives the code bytes during Flash programming and outputs the code bytes dur-
ing program verification. External pull-ups are required during program verification.
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the inter-
nal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low
will source current (I
In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input
(P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the follow-
ing table.
Port 1 also receives the low-order address bytes during Flash programming and verification.
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can
sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the inter-
nal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low
will source current (I
Port 2 emits the high-order address byte during fetches from external program memory and dur-
ing accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this
application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external
data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special
Function Register.
Port 2 also receives the high-order address bits and some control signals during Flash program-
ming and verification.
Port Pin
P1.0
P1.1
P1.5
P1.6
P1.7
Alternate Functions
T2 (external count input to Timer/Counter 2), clock-out
T2EX (Timer/Counter 2 capture/reload trigger and direction control)
MOSI (used for In-System Programming)
MISO (used for In-System Programming)
SCK (used for In-System Programming)
IL
IL
) because of the internal pull-ups.
) because of the internal pull-ups.
1919D–MICRO–6/08

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