ATmega164A Atmel Corporation, ATmega164A Datasheet - Page 21
ATmega164A
Manufacturer Part Number
ATmega164A
Description
Manufacturer
Atmel Corporation
Specifications of ATmega164A
Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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8.3.1
8272C–AVR–06/11
Data Memory Access Times
The 32 general purpose working registers, 64 I/O registers, 160 Extended I/O Registers and
t h e 1 0 2 4 / 2 0 4 8 / 4 0 9 6 b y t e s o f i n t e r n a l d a t a S R A M i n t h e
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P are all accessible through all these
addressing modes. The Register File is described in
13.
Figure 8-2.
This section describes the general access timing concepts for internal memory access. The
internal data SRAM access is performed in two clk
Figure 8-3.
Address
ATmega164A/PA/324A/PA/644A/PA/1284/P
clk
Data Memory Map for
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P
On-chip Data SRAM Access Cycles
Data
Data
WR
CPU
(1024/2048/4096/16384x 8)
RD
160 Ext I/O Reg.
64 I/O Registers
Data Memory
Internal SRAM
32 Registers
Compute Address
T1
Memory Access Instruction
0x0000 - 0x001F
0x0100
0x04FF/0x08FF/0x10FF /0x40FF
0x0020 - 0x005F
0x0060 - 0x00FF
Address valid
CPU
T2
”General Purpose Register File” on page
cycles as described in
Next Instruction
T3
Figure
8-3.
21
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