ATmega328P Atmel Corporation, ATmega328P Datasheet - Page 12
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ATmega328P
Manufacturer Part Number
ATmega328P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega328P
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Company
Part Number
Manufacturer
Quantity
Price
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Note:
8271DS–AVR–05/11
0x0D (0x2D)
0x0C (0x2C)
0x1B (0x3B)
0x1A (0x3A)
0x0E (0x2E)
0x0B (0x2B)
0x0A (0x2A)
Address
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x0 (0x20)
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
5. Only valid for ATmega88A/88PA/168A/168PA/328/328P.
6. BODS and BODSE only available for picoPower devices ATmega48PA/88PA/168PA/328P
should never be written.
registers, the value of single bits can be checked by using the SBIS and SBIC instructions.
instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only.
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The
ATmega48A/PA/88A/PA/168A/PA/328/P is a complex microcontroller with more peripheral units than can be supported
within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in
SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Name
PORTD
PORTC
PORTB
PCIFR
DDRD
DDRC
TIFR2
TIFR1
TIFR0
DDRB
PIND
PINC
PINB
PORTD7
PORTB7
Bit 7
PIND7
PINB7
DDD7
DDB7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD6
PORTC6
PORTB6
Bit 6
PIND6
PINC6
PINB6
DDD6
DDC6
DDB6
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD5
PORTC5
PORTB5
Bit 5
PIND5
PINC5
PINB5
DDD5
DDC5
DDB5
ICF1
ATmega48A/PA/88A/PA/168A/PA/328/P
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD4
PORTC4
PORTB4
Bit 4
PIND4
PINC4
PINB4
DDD4
DDC4
DDB4
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD3
PORTC3
PORTB3
Bit 3
PIND3
PINC3
PINB3
DDD3
DDC3
DDB3
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD2
PORTC2
PORTB2
OCF2B
OCF1B
OCF0B
PIND2
PINC2
Bit 2
PCIF2
PINB2
DDD2
DDC2
DDB2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD1
PORTC1
PORTB1
OCF2A
OCF1A
OCF0A
Bit 1
PCIF1
PIND1
PINC1
PINB1
DDD1
DDC1
DDB1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PORTD0
PORTC0
PORTB0
Bit 0
PIND0
PINC0
PINB0
PCIF0
DDD0
DDC0
TOV2
TOV1
TOV0
DDB0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
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