ATmega329A Atmel Corporation, ATmega329A Datasheet - Page 66

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ATmega329A

Manufacturer Part Number
ATmega329A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega329A

Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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14. I/O-Ports
14.1
8284D–AVR–6/11
Overview
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
All AVR ports have true Read-Modify-Write functionality when used as general digital I/O ports.
This means that the direction of one port pin can be changed without unintentionally changing
the direction of any other pin with the SBI and CBI instructions. The same applies when chang-
ing drive value (if configured as output) or enabling/disabling of pull-up resistors (if configured as
input). Each output buffer has symmetrical drive characteristics with both high sink and source
capability. Port B has a higher pin driver strength than the other ports, but all the pin drivers are
strong enough to drive LED displays directly. All port pins have individually selectable pull-up
resistors with a supply-voltage invariant resistance. All I/O pins have protection diodes to both
V
a complete list of parameters. If exceeding the pin voltage “Absolute Maximum Ratings”, result-
ing currents can harm the device if not limited accordingly. For segment pins used as general
I/O, the same situation can also influence the LCD voltage level.
Figure 14-1. I/O Pin Equivalent Schematic
All registers and bit references in this section are written in general form. A lower case “x” repre-
sents the numbering letter for the port, and a lower case “n” represents the bit number. However,
when using the register or bit defines in a program, the precise form must be used. For example,
PORTB3 for bit no. 3 in Port B, here documented generally as PORTxn. The physical I/O Regis-
ters and bit locations are listed in
Three I/O memory address locations are allocated for each port, one each for the Data Register
– PORTx, Data Direction Register – DDRx, and the Port Input Pins – PINx. The Port Input Pins
I/O location is read only, while the Data Register and the Data Direction Register are read/write.
However, writing a logic one to a bit in the PINx Register, will result in a toggle in the correspond-
ing bit in the Data Register. In addition, the Pull-up Disable – PUD bit in MCUCR disables the
pull-up function for all pins in all ports when set.
Using the I/O port as General Digital I/O is described in
67. Most port pins are multiplexed with alternate functions for the peripheral features on the
device. How each alternate function interferes with the port pin is described in
CC
and Ground as indicated in
Pxn
Figure
”Register Description” on page
C
pin
14-1. Refer to
”Electrical Characteristics” on page 344
”Ports as General Digital I/O” on page
"General Digital I/O" for
93.
See Figure
R
Details
pu
Logic
”Alternate Port
for
66

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