ATmega32M1 Automotive Atmel Corporation, ATmega32M1 Automotive Datasheet - Page 205
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ATmega32M1 Automotive
Manufacturer Part Number
ATmega32M1 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA16M1_AUTOMOTIVE.pdf
(12 pages)
3.ATMEGA16M1_AUTOMOTIVE.pdf
(25 pages)
4.ATMEGA16M1_AUTOMOTIVE.pdf
(367 pages)
Specifications of ATmega32M1 Automotive
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #2
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #3
- ATMEGA16M1_AUTOMOTIVE PDF datasheet #4
- Current page: 205 of 367
- Download datasheet (7Mb)
17.3
17.3.1
17.3.2
7647G–AVR–09/11
LIN Protocol
Master and Slave
Frames
BREAK
Break Delimiter
Field
HEADER
A LIN cluster consists of one master task and several slave tasks. A master node contains the
master task as well as a slave task. All other nodes contain a slave task only.
Figure 17-1. LIN cluster with one master node and “n” slave nodes
The master task decides when and which frame shall be transferred on the bus. The slave
tasks provide the data transported by each frame. Both the master task and the slave task are
parts of the Frame handler
A frame consists of a header (provided by the master task) and a response (provided by a
slave task).
The header consists of a BREAK and SYNC pattern followed by a PROTECTED IDENTIFIER.
The identifier uniquely defines the purpose of the frame. The slave task appointed for provid-
ing the response associated with the identifier transmits it. The response consists of a DATA
field and a CHECKSUM field.
Figure 17-2. Master and slave tasks behavior in LIN frame
The slave tasks waiting for the data associated with the identifier receives the response and
uses the data transported after verifying the checksum.
Figure 17-3. Structure of a LIN frame
Slave Task 1
Slave Task 2
SYNC
Master Task
Field
master node
master task
slave task
PROTECTED
IDENTIFIER
HEADER
Response Space
Field
FRAME SLOT
RESPONSE
DATA-0
Atmel ATmega16/32/64/M1/C1
slave node
slave task
LIN bus
Field
1
RESPONSE
Each byte field is transmitted as a serial byte, LSB first.
DATA-n
HEADER
Inter-Byte Space
Field
slave node
slave task
CHECKSUM
n
RESPONSE
Field
Inter-Frame Space
205
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