ATmega88 Automotive Atmel Corporation, ATmega88 Automotive Datasheet - Page 132

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ATmega88 Automotive

Manufacturer Part Number
ATmega88 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega88 Automotive

Flash (kbytes)
8 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
14.10.5
14.10.6
14.10.7
14.10.8
132
ATmega48/88/168 Automotive
Output Compare Register 1 A – OCR1AH and OCR1AL
Output Compare Register 1 B – OCR1BH and OCR1BL
Input Capture Register 1 – ICR1H and ICR1L
Timer/Counter1 Interrupt Mask Register – TIMSK1
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNT1). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC1x pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers.
The Input Capture is updated with the counter (TCNT1) value each time an event occurs on the
ICP1 pin (or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture
can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit
registers.
• Bit 7, 6 – Res: Reserved Bits
These bits are unused bits in the ATmega48/88/168, and will always read as zero.
• Bit 5 – ICIE1: Timer/Counter1, Input Capture Interrupt Enable
When this bit is written to one, and the I-flag in the Status Register is set (interrupts globally
enabled), the Timer/Counter1 Input Capture interrupt is enabled. The corresponding Interrupt
Vector (see “Interrupts” on page 52) is executed when the ICF1 Flag, located in TIFR1, is set.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
See “Accessing 16-bit Registers” on page 107.
See “Accessing 16-bit Registers” on page 107.
R/W
R/W
R/W
R
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R
6
0
6
0
6
0
6
0
ICIE1
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
R/W
R/W
R/W
R
4
0
4
0
4
0
4
0
OCR1A[15:8]
OCR1B[15:8]
OCR1A[7:0]
OCR1B[7:0]
ICR1[15:8]
ICR1[7:0]
R/W
R/W
R/W
R
3
0
3
0
3
0
3
0
OCIE1B
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
OCIE1A
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
TOIE1
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
7530I–AVR–02/10
OCR1AH
OCR1BH
OCR1AL
OCR1BL
TIMSK1
ICR1H
ICR1L

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