ATtiny5 Atmel Corporation, ATtiny5 Datasheet
ATtiny5
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ATtiny5 Summary of contents
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... Library Support for Capacitive Touch Sensing (1 Channel) – One 16-bit Timer/Counter with Prescaler and Two PWM Channels – Programmable Watchdog Timer with Separate On-chip Oscillator – 4-channel, 8-bit Analog to Digital Converter (ATtiny5/10, only) – On-chip Analog Comparator • Special Microcontroller Features – ...
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Pin Configurations Figure 1-1. (PCINT1/TPICLK/CLKI/ICP0/OC0B/ADC1/AIN1) PB1 (PCINT1/TPICLK/CLKI/ICP0/OC0B/ADC1/AIN1) PB1 1.1 Pin Description 1.1.1 VCC Supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB3..PB0) This is a 4-bit, bi-directional I/O port with internal pull-up resistors, individually selectable for each bit. The ...
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Overview ATtiny4/5/9/10 are low-power CMOS 8-bit microcontrollers based on the compact AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny4/5/9/10 achieve throughputs approaching 1 MIPS per MHz, allowing the system designer to optimize ...
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... PWM channels, internal and external interrupts, a programmable watchdog timer with internal oscillator, an internal calibrated oscillator, and four software select- able power saving modes. ATtiny5/10 are also equipped with a four-channel, 8-bit Analog to Digital Converter (ADC). Idle mode stops the CPU while allowing the SRAM, timer/counter, ADC (ATtiny5/10, only), ana- log comparator, and interrupt system to continue functioning ...
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General Information 3.1 Resources A comprehensive set of drivers, application notes, data sheets and descriptions on development tools are available for download at http://www.atmel.com/avr. 3.2 Code Examples This documentation contains simple code examples that briefly show how to use ...
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Register Summary Address Name Bit 7 0x3F SREG I 0x3E SPH 0x3D SPL 0x3C CCP 0x3B RSTFLR – 0x3A SMCR – 0x39 OSCCAL 0x38 Reserved – 0x37 CLKMSR – 0x36 CLKPSR – 0x35 PRR – 0x34 VLMCSR VLMF 0x33 ...
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... Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI instructions will only operation the specified bit, and can therefore be used on registers containing such Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only. 4. The ADC is available in ATtiny5/10, only. 8127ES–AVR–11/11 ATtiny4/5/9/10 ...
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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add without Carry ADC Rd, Rr Add with Carry SUB Rd, Rr Subtract without Carry SUBI Rd, K Subtract Immediate SBC Rd, Rr Subtract with Carry SBCI ...
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Mnemonics Operands BCLR s Flag Clear SBI A, b Set Bit in I/O Register CBI A, b Clear Bit in I/O Register BST Rr, b Bit Store from Register to T BLD Rd, b Bit load from T to Register ...
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Ordering Information 6.1 ATtiny4 Supply Voltage Speed 12 MHz 1.8 – 5.5V 10 MHz Notes: 1. For speed vs. supply voltage, see section 2. All packages are Pb-free, halide-free and fully green and they comply with the European directive ...
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... Plastic Ultra Thin Dual Flat No Lead (UDFN) 8127ES–AVR–11/11 (1) Temperature Industrial (4) (-40°C to 85°C) Extended (7) (-40°C to 125°C) 16.3 “Speed” on page 118. Package Type ATtiny4/5/9/10 (2) (3) Package Ordering Code (5) 6ST1 ATtiny5-TSHR (6) 8MA4 ATtiny5-MAHR (5) 6ST1 ATtiny5-TS8R 11 ...
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ATtiny9 Supply Voltage Speed 12 MHz 1.8 – 5.5V 10 MHz Notes: 1. For speed vs. supply voltage, see section 2. All packages are Pb-free, halide-free and fully green and they comply with the European directive for Restriction of ...
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ATtiny10 Supply Voltage Speed 12 MHz 1.8 – 5.5V 10 MHz Notes: 1. For speed vs. supply voltage, see section 2. All packages are Pb-free, halide-free and fully green and they comply with the European directive for Restriction of ...
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Packaging Information 7.1 6ST1 Pin # Top View 0. View B Notes: 1. This package is compliant with JEDEC specification MO-178 Variation AB 2. Dimension D does ...
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E Pin TOP VIEW C0.2 4 BOTTOM VIEW Note: 1. ALL DIMENSIONS ARE IN mm. ANGLES IN DEGREES. 2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL ...
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... Problem Fix / Workaround When programming Lock Bits, make sure lock mode is not set to present, or lower levels. 8.1.3 Rev. A – C Not sampled. 8.2 ATtiny5 8.2.1 Rev. E • Programming Lock Bits 1. Programming Lock Bits Programming Lock Bits to a lock mode equal or lower than the current causes one word of Flash to be corrupted ...
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Rev. D • ESD HBM (ESD STM 5.1) level ±1000V • Programming Lock Bits 1. ESD HBM (ESD STM 5.1) level ±1000V The device meets ESD HBM (ESD STM 5.1) level ±1000V. Problem Fix / Workaround Always use proper ...
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Rev. A – C Not sampled. 8.4 ATtiny10 8.4.1 Rev. E • Programming Lock Bits 1. Programming Lock Bits Programming Lock Bits to a lock mode equal or lower than the current causes one word of Flash to be ...
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... Added topside and bottomside marking notes in page 5. Added ESD errata, see 6. Added Lock bits re-programming errata, see 9.4 Rev. 8127B – 08/09 1. Updated document template 2. Expanded document to also cover devices ATtiny4, ATtiny5 and ATtiny9 3. Added section: – 4. Updated sections: – – – – ...
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... Layer of Tiny Programming Interface” on page 97 “Overview” on page 108 “ADC Characteristics (ATtiny5/10, only)” on page 121 “Supply Current of I/O Modules” on page 123 “Register Summary” on page 150 “Ordering Information” on page 154 “Using an External Programmer for In-System Programming via TPI” on page 98 “ ...
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ATtiny4/5/9/10 21 ...
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