SAM3N1A Atmel Corporation, SAM3N1A Datasheet - Page 451
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SAM3N1A
Manufacturer Part Number
SAM3N1A
Description
Manufacturer
Atmel Corporation
Specifications of SAM3N1A
Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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27.8.3
Name:
Address:
Access:
• RD: Receive Data
Data received by the SPI Interface is stored in this register right-justified. Unused bits read zero.
• PCS: Peripheral Chip Select
In Master Mode only, these bits indicate the value on the NPCS pins at the end of a transfer. Otherwise, these bits read
zero.
Note:
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
31
23
15
–
–
7
When using variable peripheral select mode (PS = 1 in SPI_MR) it is mandatory to also set the WDRBT field to 1 if the
SPI_RDR PCS field is to be processed.
SPI Receive Data Register
30
22
14
SPI_RDR
0x40008008
Read-only
–
–
6
29
21
13
–
–
5
28
20
12
–
–
4
RD
RD
27
19
11
–
3
26
18
10
–
2
PCS
25
17
–
9
1
SAM3N
SAM3N
24
16
–
8
0
451
451
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