SAM3S4B Atmel Corporation, SAM3S4B Datasheet - Page 808
SAM3S4B
Manufacturer Part Number
SAM3S4B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S4B
Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
48
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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SAM3S
The following flowchart
the PDC. Polling or interrupt method can be used to wait for the end of write according to the
contents of the Interrupt Mask Register (HSMCI_IMR).
Figure 35-10. Multiple Write Functional Flow Diagram
Note:
1. It is assumed that this command has been correctly sent (see
(Figure
Configure the PDC channel
HSMCI_TPR = Data Buffer Address
HSMCI_TCR = BlockLength/4
Send SET_BLOCKLEN command
35-10) shows how to manage a multiple write block transfer with
Send SELECT/DESELECT_CARD
Send WRITE_MULTIPLE_BLOCK
Read status register HSMCI_SR
Set the PDCMODE bit
HSMCI_MR |= PDCMODE
Set the block length
HSMCI_MR |= (BlockLength << 16)
command
Send STOP_TRANSMISSION
HSMCI_PTCR = TXTEN
NOTBUSY = 0?
command
command
(1)
RETURN
BLKE = 0?
Poll the bit
Poll the bit
to select the card
No
No
(1)
(1)
(1)
Yes
Yes
Figure
35-7).
6500C–ATARM–8-Feb-11
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