SAM3U1E Atmel Corporation, SAM3U1E Datasheet - Page 48

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SAM3U1E

Manufacturer Part Number
SAM3U1E
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U1E

Flash (kbytes)
64 Kbytes
Pin Count
144
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
57
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
5
Twi (i2c)
2
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
20
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
12.4
12.5
12.6
48
Universal Synchronous Asynchronous Receiver Transmitter (USART)
Serial Synchronous Controller (SSC)
Timer Counter (TC)
SAM3U Series
• Programmable Baud Rate Generator
• 5- to 9-bit full-duplex synchronous or asynchronous serial communications
• RS485 with driver control signal
• ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards
• SPI Mode
• IrDA modulation and demodulation
• Test Modes
• Provides serial synchronous communication links used in audio and telecom applications
• Contains an independent receiver and transmitter and a common clock divider
• Offers a configurable frame sync and data length
• Receiver and transmitter can be programmed to start automatically or on detection of
• Receiver and transmitter include a data signal, a clock signal and a frame synchronization
• Three 16-bit Timer Counter Channels
• Wide range of functions including:
(with CODECs in Master or Slave Modes, I
different event on the frame sync signal
signal
– 1, 1.5 or 2 stop bits in Asynchronous Mode or 1 or 2 stop bits in Synchronous Mode
– Parity generation and error detection
– Framing error detection, overrun error detection
– MSB- or LSB-first
– Optional break generation and detection
– By 8 or by-16 over-sampling receiver frequency
– Hardware handshaking RTS-CTS
– Receiver time-out and transmitter timeguard
– Optional Multi-drop Mode with address generation and detection
– Optional Manchester Encoding
– NACK handling, error counter with repetition and iteration limit
– Master or Slave
– Serial Clock programmable Phase and Polarity
– SPI Serial Clock (SCK) Frequency up to MCK/6
– Communication at up to 115.2 Kbps
– Remote Loopback, Local Loopback, Automatic Echo
– Frequency Measurement
– Event Counting
– Interval Measurement
2
S, TDM Buses, Magnetic Card Reader, ...)
6430ES–ATARM–22-Aug-11

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