SAM7S64 Atmel Corporation, SAM7S64 Datasheet - Page 70
SAM7S64
Manufacturer Part Number
SAM7S64
Description
Manufacturer
Atmel Corporation
Specifications of SAM7S64
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Programmer’s Model
2.10
2-24
Reset
When the nRESET signal goes LOW a reset occurs, and the ARM7TDMI core
abandons the executing instruction and continues to increment the address bus as if still
fetching word or halfword instructions. nMREQ and SEQ indicates internal cycles
during this time.
When nRESET goes HIGH again, the ARM7TDMI processor:
1.
2.
3.
4.
After reset, all register values except the PC and CPSR are indeterminate.
More information is provided in Reset sequence after power up on page 3-33.
Overwrites R14_svc and SPSR_svc by copying the current values of the PC and
CPSR into them. The values of the PC and CPSR are indeterminate.
Forces M[4:0] to b10011, Supervisor mode, sets the I and F bits, and clears the
T-bit in the CPSR.
Forces the PC to fetch the next instruction from address
Reverts to ARM state if necessary and resumes execution.
Copyright © 1994-2001. All rights reserved.
.
ARM DDI 0029G
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