SAM7SE32 Atmel Corporation, SAM7SE32 Datasheet - Page 46

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SAM7SE32

Manufacturer Part Number
SAM7SE32
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7SE32

Flash (kbytes)
32 Kbytes
Pin Count
144
Max. Operating Frequency
48 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
88
Ext Interrupts
88
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Revision History
46
Doc. Rev
6222AS
6222BS
6222CS
6222DS
6222ES
6222FS
AT91SAM7SE512/256/32 Summary
Comments
First issue
Revised Memories with condensed mapping.
Added Package Outlines and 144-ball LFBGA pin and ordering information.
Section 12. “Ordering Information” on page 45
Section 6.1 ”JTAG Port
tolerant”
Section 7.6 ”SDRAM
INL and DNL updated in
“Features”
Section 7.1 ”ARM7TDMI
Section 7.8 ”Peripheral DMA Controller”
Section 7.5 ”Static Memory
synchronous operations.
Figure 8-1 ”AT91SAM7SE Memory Mapping”
shown with EBI Chip Select 2.
Section 8.1.2.1 ”Flash
Section 6. ”/O Lines
updated
Section 10.11 ”Timer
Features:
“Mode for General Purpose Two-wire UART Serial Communication” added to
Signal Description:
Table 3-1, “Signal Description
System Controller:
Figure 9-1 ”System Controller Block
on page 2, Fully Static Operation; added, up to 55 MHz at 1.8V and 85°C worst case conditions
Considerations”,
Controller”, Mobile SDRAM controller added to SDRAMC features
Counter”, .....the TC has two output compare and one input capture per channel.
Overview”, updated AT91SAM7SE32 ...”reads as 8192 32-bit words.”
Pins”,
Section 10.14 ”Analog-to-Digital Converter”
Processor”, Runs at up to 55 MHz, providing 0.9 MIPS/MHz (core supplied with 1.8V)
Controller”, Multiple device adaptability includes: compliant w/PSRAM in
Section 6.3 ”Reset
List”, AD0-AD3 and AD4-AD7 comments reversed.
Diagram”, ‘periph_nreset’ changed into ‘power_on_reset’ for RTT.
“JTAG Port
PDC priority list added
Compact Flash not shown w/EBI Chip Select 5. Compact Flash is
ordering information code reference changed
Pin”,
Pins”,
Section 6.5 ”SDCK
“Test
Pin”,
“Reset
Pin”,
Pin”, removed statement: “not 5V
“Debug Unit
“ERASE Pin”
(DBGU)”.
descriptions
6222ES–ATARM–15-Dec-09
Change
Request
Ref.
#2709
#3699
#3826
#4005
#3924
#3833
review
4804
4512
5062
4209
5846
5271
5222

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