SAM9260 Atmel Corporation, SAM9260 Datasheet - Page 248
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SAM9260
Manufacturer Part Number
SAM9260
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.SAM9260.pdf
(290 pages)
4.SAM9260.pdf
(802 pages)
5.SAM9260.pdf
(47 pages)
Specifications of SAM9260
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
210 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
7
Ssc
1
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
Yes
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
312
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- M40800 PDF datasheet #2
- SAM9260 PDF datasheet #3
- SAM9260 PDF datasheet #4
- SAM9260 PDF datasheet #5
- Current page: 248 of 284
- Download datasheet (2Mb)
Debug in Depth
B.9.3
B.9.4
B-30
Watchpoint with another exception
Debug request
Debug entry adds four addresses to the PC and every instruction adds one address. The
difference from breakpoint is that the instruction that caused the watchpoint has
executed and the program must return to the next instruction.
If a watchpointed access simultaneously causes a Data Abort, the ARM7TDMI core
enters debug state in abort mode. Entry into debug is held off until the core changes into
abort mode and has fetched the instruction from the abort vector.
A similar sequence follows when an interrupt, or any other exception, occurs during a
watchpointed memory access. The ARM7TDMI core enters debug state in the mode of
the exception. The debugger must check to see if an exception has occurred by
examining the current and previous mode, in the CPSR and SPSR, and the value of the
PC. When an exception has taken place, you must give the user the choice of servicing
the exception before debugging.
Entry to debug state when an exception has occurred causes the PC to be incremented
by three instructions rather than four and this must be considered in return branch
calculation when exiting debug state. For example, suppose that an abort occurs on a
watchpointed access and ten instructions have been executed to determine this
eventuality. You can use the following sequence to return to program execution:
This code forces a branch back to the abort vector, causing the instruction at that
location to be refetched and executed.
After the abort service routine, the instruction that caused the abort and watchpoint is
refetched and executed. This triggers the watchpoint again and the ARM7TDMI core
re-enters debug state.
Entry into debug state through a debug request is similar to a breakpoint. However,
unlike a breakpoint, the last instruction has completed execution and so must not be
refetched on exit from debug state. You can assume that entry to debug state adds three
addresses to the PC and every instruction executed in debug state adds one address.
For example, suppose that you have invoked a debug request and decided to return to
program execution straight away. You can use the following sequence:
Note
Copyright © 1994-2001. All rights reserved.
ARM DDI 0029G
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