SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 516
SAM9G45
Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G45.pdf
(10 pages)
5.SAM9G45.pdf
(55 pages)
6.SAM9G45.pdf
(1196 pages)
Specifications of SAM9G45
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G45 PDF datasheet #4
- SAM9G45 PDF datasheet #5
- SAM9G45 PDF datasheet #6
- Current page: 516 of 1274
- Download datasheet (30Mb)
31.7.11
Name:
Address:
Access:
Reset:
• DISx: [7:0]
Write one to this field to disable the relevant DMAC Channel. The content of the FIFO is lost and the current AHB access is
terminated. Software must poll DIS[7:0] field in the DMAC_CHSR register to be sure that the channel is disabled.
• RESx: [7:0]
Write one to this field to resume the channel transfer restoring its context.
516
516
RES7
DIS7
31
23
15
–
–
7
SAM9G35
SAM9G35
DMAC Channel Handler Disable Register
DMAC_CHDR
0xFFFFEC2C (0), 0xFFFFEE2C (1)
Write-only
0x00000000
RES6
DIS6
30
22
14
–
–
6
RES5
DIS5
29
21
13
–
–
5
RES4
DIS4
28
20
12
–
–
4
RES3
DIS3
27
19
11
–
–
3
RES2
DIS2
26
18
10
–
–
2
RES1
DIS1
25
17
–
–
9
1
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
RES0
DIS0
24
16
–
–
8
0
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