SAM9G46 Atmel Corporation, SAM9G46 Datasheet - Page 80
SAM9G46
Manufacturer Part Number
SAM9G46
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G46.pdf
(58 pages)
Specifications of SAM9G46
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Memory Management Unit
3.2.9
3-16
Translating large page references
The two least significant bits of the second-level descriptor indicate the descriptor type
as shown in Table 3-8.
Tiny pages do not support subpage permissions and therefore only have one set of
access permission bits.
Figure 3-10 on page 3-17 shows the complete translation sequence for a 64KB large
page.
Bits
Large
[11:4]
[3:2]
[1:0]
Value
0 0
0 1
1 0
1 1
Copyright © 2001-2003 ARM Limited. All rights reserved.
Note
Small
[11:4]
[3:2]
[1:0]
Meaning
Invalid
Large page
Small page
Tiny page
Tiny
[5:4]
[3:2]
[1:0]
Access permission bits. Domain access control on page 3-24
These bits indicate the page size and validity and are
Description
and Fault checking sequence on page 3-26 show how to
interpret the access permission bits.
These bits, C and B, indicate whether the area of memory
mapped by this page is treated as write-back cachable,
write-through cachable, noncached buffered, or noncached
nonbuffered.
interpreted as shown in Table 3-8.
Table 3-7 Second-level descriptor bits (continued)
Table 3-8 Interpreting page table entry bits [1:0]
Description
Generates a page translation fault
Indicates that this is a 64KB page
Indicates that this is a 4KB page
Indicates that this is a 1KB page
ARM DDI0198D
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